diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/lib/aarch32/arch.h | 38 | ||||
| -rw-r--r-- | include/lib/el3_runtime/aarch64/context.h | 28 | ||||
| -rw-r--r-- | include/lib/extensions/amu.h | 2 | ||||
| -rw-r--r-- | include/lib/smcc.h | 11 | ||||
| -rw-r--r-- | include/services/arm_arch_svc.h | 14 |
5 files changed, 64 insertions, 29 deletions
diff --git a/include/lib/aarch32/arch.h b/include/lib/aarch32/arch.h index 134d5346..3624cc68 100644 --- a/include/lib/aarch32/arch.h +++ b/include/lib/aarch32/arch.h @@ -544,7 +544,7 @@ #define AMCNTENCLR0 p15, 0, c13, c2, 4 #define AMCNTENSET0 p15, 0, c13, c2, 5 #define AMCNTENCLR1 p15, 0, c13, c3, 0 -#define AMCNTENSET1 p15, 0, c13, c1, 1 +#define AMCNTENSET1 p15, 0, c13, c3, 1 /* Activity Monitor Group 0 Event Counter Registers */ #define AMEVCNTR00 p15, 0, c0 @@ -558,4 +558,40 @@ #define AMEVTYPER02 p15, 0, c13, c6, 2 #define AMEVTYPER03 p15, 0, c13, c6, 3 +/* Activity Monitor Group 1 Event Counter Registers */ +#define AMEVCNTR10 p15, 0, c4 +#define AMEVCNTR11 p15, 1, c4 +#define AMEVCNTR12 p15, 2, c4 +#define AMEVCNTR13 p15, 3, c4 +#define AMEVCNTR14 p15, 4, c4 +#define AMEVCNTR15 p15, 5, c4 +#define AMEVCNTR16 p15, 6, c4 +#define AMEVCNTR17 p15, 7, c4 +#define AMEVCNTR18 p15, 0, c5 +#define AMEVCNTR19 p15, 1, c5 +#define AMEVCNTR1A p15, 2, c5 +#define AMEVCNTR1B p15, 3, c5 +#define AMEVCNTR1C p15, 4, c5 +#define AMEVCNTR1D p15, 5, c5 +#define AMEVCNTR1E p15, 6, c5 +#define AMEVCNTR1F p15, 7, c5 + +/* Activity Monitor Group 1 Event Type Registers */ +#define AMEVTYPER10 p15, 0, c13, c14, 0 +#define AMEVTYPER11 p15, 0, c13, c14, 1 +#define AMEVTYPER12 p15, 0, c13, c14, 2 +#define AMEVTYPER13 p15, 0, c13, c14, 3 +#define AMEVTYPER14 p15, 0, c13, c14, 4 +#define AMEVTYPER15 p15, 0, c13, c14, 5 +#define AMEVTYPER16 p15, 0, c13, c14, 6 +#define AMEVTYPER17 p15, 0, c13, c14, 7 +#define AMEVTYPER18 p15, 0, c13, c15, 0 +#define AMEVTYPER19 p15, 0, c13, c15, 1 +#define AMEVTYPER1A p15, 0, c13, c15, 2 +#define AMEVTYPER1B p15, 0, c13, c15, 3 +#define AMEVTYPER1C p15, 0, c13, c15, 4 +#define AMEVTYPER1D p15, 0, c13, c15, 5 +#define AMEVTYPER1E p15, 0, c13, c15, 6 +#define AMEVTYPER1F p15, 0, c13, c15, 7 + #endif /* __ARCH_H__ */ diff --git a/include/lib/el3_runtime/aarch64/context.h b/include/lib/el3_runtime/aarch64/context.h index 5e212ec3..5f6bdc97 100644 --- a/include/lib/el3_runtime/aarch64/context.h +++ b/include/lib/el3_runtime/aarch64/context.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -46,26 +46,12 @@ #define CTX_GPREG_SP_EL0 U(0xf8) #define CTX_GPREGS_END U(0x100) -#if WORKAROUND_CVE_2017_5715 -#define CTX_CVE_2017_5715_OFFSET (CTX_GPREGS_OFFSET + CTX_GPREGS_END) -#define CTX_CVE_2017_5715_QUAD0 U(0x0) -#define CTX_CVE_2017_5715_QUAD1 U(0x8) -#define CTX_CVE_2017_5715_QUAD2 U(0x10) -#define CTX_CVE_2017_5715_QUAD3 U(0x18) -#define CTX_CVE_2017_5715_QUAD4 U(0x20) -#define CTX_CVE_2017_5715_QUAD5 U(0x28) -#define CTX_CVE_2017_5715_END U(0x30) -#else -#define CTX_CVE_2017_5715_OFFSET CTX_GPREGS_OFFSET -#define CTX_CVE_2017_5715_END CTX_GPREGS_END -#endif - /******************************************************************************* * Constants that allow assembler code to access members of and the 'el3_state' * structure at their correct offsets. Note that some of the registers are only * 32-bits wide but are stored as 64-bit values for convenience ******************************************************************************/ -#define CTX_EL3STATE_OFFSET (CTX_CVE_2017_5715_OFFSET + CTX_CVE_2017_5715_END) +#define CTX_EL3STATE_OFFSET (CTX_GPREGS_OFFSET + CTX_GPREGS_END) #define CTX_SCR_EL3 U(0x0) #define CTX_RUNTIME_SP U(0x8) #define CTX_SPSR_EL3 U(0x10) @@ -200,9 +186,6 @@ /* Constants to determine the size of individual context structures */ #define CTX_GPREG_ALL (CTX_GPREGS_END >> DWORD_SHIFT) -#if WORKAROUND_CVE_2017_5715 -#define CTX_CVE_2017_5715_ALL (CTX_CVE_2017_5715_END >> DWORD_SHIFT) -#endif #define CTX_SYSREG_ALL (CTX_SYSREGS_END >> DWORD_SHIFT) #if CTX_INCLUDE_FPREGS #define CTX_FPREG_ALL (CTX_FPREGS_END >> DWORD_SHIFT) @@ -218,10 +201,6 @@ */ DEFINE_REG_STRUCT(gp_regs, CTX_GPREG_ALL); -#if WORKAROUND_CVE_2017_5715 -DEFINE_REG_STRUCT(cve_2017_5715_regs, CTX_CVE_2017_5715_ALL); -#endif - /* * AArch64 EL1 system register context structure for preserving the * architectural state during switches from one security state to @@ -263,9 +242,6 @@ DEFINE_REG_STRUCT(el3_state, CTX_EL3STATE_ALL); */ typedef struct cpu_context { gp_regs_t gpregs_ctx; -#if WORKAROUND_CVE_2017_5715 - cve_2017_5715_regs_t cve_2017_5715_regs_ctx; -#endif el3_state_t el3state_ctx; el1_sys_regs_t sysregs_ctx; #if CTX_INCLUDE_FPREGS diff --git a/include/lib/extensions/amu.h b/include/lib/extensions/amu.h index faa0ee12..559c8f13 100644 --- a/include/lib/extensions/amu.h +++ b/include/lib/extensions/amu.h @@ -7,10 +7,10 @@ #ifndef __AMU_H__ #define __AMU_H__ -#include <sys/cdefs.h> /* for CASSERT() */ #include <cassert.h> #include <platform_def.h> #include <stdint.h> +#include <sys/cdefs.h> /* for CASSERT() */ /* All group 0 counters */ #define AMU_GROUP0_COUNTERS_MASK 0xf diff --git a/include/lib/smcc.h b/include/lib/smcc.h index 13b1e7ac..a273b3af 100644 --- a/include/lib/smcc.h +++ b/include/lib/smcc.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -67,6 +67,11 @@ #include <cassert.h> #include <stdint.h> +#define SMCCC_MAJOR_VERSION U(1) +#define SMCCC_MINOR_VERSION U(1) + +#define MAKE_SMCCC_VERSION(_major, _minor) (((_major) << 16) | (_minor)) + /* Various flags passed to SMC handlers */ #define SMC_FROM_SECURE (U(0) << 0) #define SMC_FROM_NON_SECURE (U(1) << 0) @@ -78,6 +83,10 @@ #define is_std_svc_call(_fid) ((((_fid) >> FUNCID_OEN_SHIFT) & \ FUNCID_OEN_MASK) == OEN_STD_START) +/* The macro below is used to identify a Arm Architectural Service SMC call */ +#define is_arm_arch_svc_call(_fid) ((((_fid) >> FUNCID_OEN_SHIFT) & \ + FUNCID_OEN_MASK) == OEN_ARM_START) + /* The macro below is used to identify a valid Fast SMC call */ #define is_valid_fast_smc(_fid) ((!(((_fid) >> 16) & U(0xff))) && \ (GET_SMC_TYPE(_fid) == SMC_TYPE_FAST)) diff --git a/include/services/arm_arch_svc.h b/include/services/arm_arch_svc.h new file mode 100644 index 00000000..29616013 --- /dev/null +++ b/include/services/arm_arch_svc.h @@ -0,0 +1,14 @@ +/* + * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef __ARM_ARCH_SVC_H__ +#define __ARM_ARCH_SVC_H__ + +#define SMCCC_VERSION U(0x80000000) +#define SMCCC_ARCH_FEATURES U(0x80000001) +#define SMCCC_ARCH_WORKAROUND_1 U(0x80008000) + +#endif /* __ARM_ARCH_SVC_H__ */ |