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-rw-r--r--bl32/sp_min/aarch32/entrypoint.S12
-rw-r--r--bl32/sp_min/sp_min_main.c9
2 files changed, 15 insertions, 6 deletions
diff --git a/bl32/sp_min/aarch32/entrypoint.S b/bl32/sp_min/aarch32/entrypoint.S
index e145511d..b3fccdec 100644
--- a/bl32/sp_min/aarch32/entrypoint.S
+++ b/bl32/sp_min/aarch32/entrypoint.S
@@ -49,12 +49,12 @@ func sp_min_entrypoint
* sp_min_entrypoint() during the cold boot flow, so the cold/warm boot
* and primary/secondary CPU logic should not be executed in this case.
*
- * Also, assume that the previous bootloader has already set up the CPU
- * endianness and has initialised the memory.
+ * Also, assume that the previous bootloader has already initialised the
+ * SCTLR, including the CPU endianness, and has initialised the memory.
* ---------------------------------------------------------------------
*/
el3_entrypoint_common \
- _set_endian=0 \
+ _init_sctlr=0 \
_warm_boot_mailbox=0 \
_secondary_cold_boot=0 \
_init_memory=0 \
@@ -75,7 +75,7 @@ func sp_min_entrypoint
* ---------------------------------------------------------------------
*/
el3_entrypoint_common \
- _set_endian=1 \
+ _init_sctlr=1 \
_warm_boot_mailbox=!PROGRAMMABLE_RESET_ADDRESS \
_secondary_cold_boot=!COLD_BOOT_SINGLE_CPU \
_init_memory=1 \
@@ -174,7 +174,7 @@ func sp_min_warm_entrypoint
* 'el3_entrypoint_common' must be skipped:
*
* - Only when the platform bypasses the BL1/BL32 (SP_MIN) entrypoint by
- * programming the reset address do we need to set the CPU endianness.
+ * programming the reset address do we need to initialied the SCTLR.
* In other cases, we assume this has been taken care by the
* entrypoint code.
*
@@ -187,7 +187,7 @@ func sp_min_warm_entrypoint
* it has been done once and for all on the cold boot path.
*/
el3_entrypoint_common \
- _set_endian=PROGRAMMABLE_RESET_ADDRESS \
+ _init_sctlr=PROGRAMMABLE_RESET_ADDRESS \
_warm_boot_mailbox=0 \
_secondary_cold_boot=0 \
_init_memory=0 \
diff --git a/bl32/sp_min/sp_min_main.c b/bl32/sp_min/sp_min_main.c
index ed8c3e68..1c83cbe1 100644
--- a/bl32/sp_min/sp_min_main.c
+++ b/bl32/sp_min/sp_min_main.c
@@ -8,6 +8,7 @@
#include <arch_helpers.h>
#include <assert.h>
#include <bl_common.h>
+#include <console.h>
#include <context.h>
#include <context_mgmt.h>
#include <debug.h>
@@ -176,6 +177,14 @@ void sp_min_main(void)
* corresponding to the desired security state after the next ERET.
*/
sp_min_prepare_next_image_entry();
+
+ /*
+ * Perform any platform specific runtime setup prior to cold boot exit
+ * from SP_MIN.
+ */
+ sp_min_plat_runtime_setup();
+
+ console_flush();
}
/******************************************************************************