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Diffstat (limited to 'bl31/aarch64/runtime_exceptions.S')
-rw-r--r--bl31/aarch64/runtime_exceptions.S22
1 files changed, 22 insertions, 0 deletions
diff --git a/bl31/aarch64/runtime_exceptions.S b/bl31/aarch64/runtime_exceptions.S
index 6ffd9955..fd7656e2 100644
--- a/bl31/aarch64/runtime_exceptions.S
+++ b/bl31/aarch64/runtime_exceptions.S
@@ -67,6 +67,14 @@
/* Save GP registers and restore them afterwards */
bl save_gp_registers
+
+ /*
+ * If Secure Cycle Counter is not disabled in MDCR_EL3
+ * when ARMv8.5-PMU is implemented, save PMCR_EL0 and
+ * disable all event counters and cycle counter.
+ */
+ bl save_pmcr_disable_pmu
+
bl handle_lower_el_ea_esb
bl restore_gp_registers
@@ -123,6 +131,13 @@
bl save_gp_registers
+ /*
+ * If Secure Cycle Counter is not disabled in MDCR_EL3
+ * when ARMv8.5-PMU is implemented, save PMCR_EL0 and
+ * disable all event counters and cycle counter.
+ */
+ bl save_pmcr_disable_pmu
+
/* Save ARMv8.3-PAuth registers and load firmware key */
#if CTX_INCLUDE_PAUTH_REGS
bl pauth_context_save
@@ -335,6 +350,13 @@ smc_handler64:
/* Save general purpose registers */
bl save_gp_registers
+ /*
+ * If Secure Cycle Counter is not disabled in MDCR_EL3
+ * when ARMv8.5-PMU is implemented, save PMCR_EL0 and
+ * disable all event counters and cycle counter.
+ */
+ bl save_pmcr_disable_pmu
+
/* Save ARMv8.3-PAuth registers and load firmware key */
#if CTX_INCLUDE_PAUTH_REGS
bl pauth_context_save