diff options
Diffstat (limited to 'bl1')
| -rw-r--r-- | bl1/aarch64/bl1_exceptions.S | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/bl1/aarch64/bl1_exceptions.S b/bl1/aarch64/bl1_exceptions.S index 19a0ac27..ed7c27a1 100644 --- a/bl1/aarch64/bl1_exceptions.S +++ b/bl1/aarch64/bl1_exceptions.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -224,6 +224,14 @@ smc_handler: bl save_gp_registers /* ----------------------------------------------------- + * If Secure Cycle Counter is not disabled in MDCR_EL3 + * when ARMv8.5-PMU is implemented, save PMCR_EL0 and + * disable all event counters and cycle counter. + * ----------------------------------------------------- + */ + bl save_pmcr_disable_pmu + + /* ----------------------------------------------------- * Populate the parameters for the SMC handler. We * already have x0-x4 in place. x5 will point to a * cookie (not used now). x6 will point to the context |