diff options
| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2019-01-03 12:03:49 +0100 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2019-01-15 17:51:21 +0100 |
| commit | 021318dffb551a0222c0eb5fc23f2d04b8e601ac (patch) | |
| tree | b4d87704a6d110721642fd5f0f2d33d931dfe212 /services | |
| parent | c024ea6cd2b18487629dfc38707615bedd42901c (diff) | |
services/spm_deprecated: disable alignment checking for S-EL0
Permit unaligned accesses while executing the secure partition
payload, so that we don't have to modify existing code that we
will host there. (The UEFI spec explicitly permits unaligned
accesses)
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'services')
| -rw-r--r-- | services/std_svc/spm_deprecated/spm_setup.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/services/std_svc/spm_deprecated/spm_setup.c b/services/std_svc/spm_deprecated/spm_setup.c index beaff946..aae6cd5e 100644 --- a/services/std_svc/spm_deprecated/spm_setup.c +++ b/services/std_svc/spm_deprecated/spm_setup.c @@ -144,8 +144,6 @@ void spm_sp_setup(sp_context_t *sp_ctx) SCTLR_SA0_BIT | /* Allow cacheable data and instr. accesses to normal memory. */ SCTLR_C_BIT | SCTLR_I_BIT | - /* Alignment fault checking enabled when at EL1 and EL0. */ - SCTLR_A_BIT | /* Enable MMU. */ SCTLR_M_BIT ; @@ -153,6 +151,11 @@ void spm_sp_setup(sp_context_t *sp_ctx) sctlr_el1 &= ~( /* Explicit data accesses at EL0 are little-endian. */ SCTLR_E0E_BIT | + /* + * Alignment fault checking disabled when at EL1 and EL0 as + * the UEFI spec permits unaligned accesses. + */ + SCTLR_A_BIT | /* Accesses to DAIF from EL0 are trapped to EL1. */ SCTLR_UMA_BIT ); |