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authorAntonio Nino Diaz <antonio.ninodiaz@arm.com>2016-05-19 10:00:28 +0100
committerAntonio Nino Diaz <antonio.ninodiaz@arm.com>2016-05-20 15:29:30 +0100
commitf3d3b316f82faa88e42f3d09c97cd9e52ac92599 (patch)
tree2a89c305731e64b9385d48cfac60b10779fd5fe3 /plat
parentd44863910c3e4021e13385c616d958f47faf7abc (diff)
Implement plat_get_syscnt_freq2 on platforms
Replaced plat_get_syscnt_freq by plat_get_syscnt_freq2 on all upstream platforms. Change-Id: I3248f3f65a16dc5e9720012a05c35b9e3ba6abbe
Diffstat (limited to 'plat')
-rw-r--r--plat/arm/common/aarch64/arm_common.c16
-rw-r--r--plat/mediatek/mt8173/aarch64/platform_common.c2
-rw-r--r--plat/nvidia/tegra/include/tegra_private.h1
-rw-r--r--plat/nvidia/tegra/soc/t132/plat_setup.c2
-rw-r--r--plat/nvidia/tegra/soc/t210/plat_setup.c2
-rw-r--r--plat/rockchip/common/aarch64/platform_common.c2
-rw-r--r--plat/xilinx/zynqmp/aarch64/zynqmp_common.c4
7 files changed, 22 insertions, 7 deletions
diff --git a/plat/arm/common/aarch64/arm_common.c b/plat/arm/common/aarch64/arm_common.c
index cf1f3ba9..616edc92 100644
--- a/plat/arm/common/aarch64/arm_common.c
+++ b/plat/arm/common/aarch64/arm_common.c
@@ -29,6 +29,7 @@
*/
#include <arch.h>
#include <arch_helpers.h>
+#include <assert.h>
#include <debug.h>
#include <mmio.h>
#include <plat_arm.h>
@@ -40,7 +41,14 @@ extern const mmap_region_t plat_arm_mmap[];
/* Weak definitions may be overridden in specific ARM standard platform */
#pragma weak plat_get_ns_image_entrypoint
#pragma weak plat_arm_get_mmap
+
+/* Conditionally provide a weak definition of plat_get_syscnt_freq2 to avoid
+ * conflicts with the definition in plat/common. */
+#if ERROR_DEPRECATED
+#pragma weak plat_get_syscnt_freq2
+#else
#pragma weak plat_get_syscnt_freq
+#endif
/*******************************************************************************
* Macro generating the code for the function setting up the pagetables as per
@@ -164,9 +172,16 @@ const mmap_region_t *plat_arm_get_mmap(void)
}
#ifdef ARM_SYS_CNTCTL_BASE
+
+#if ERROR_DEPRECATED
+unsigned int plat_get_syscnt_freq2(void)
+{
+ unsigned int counter_base_frequency
+#else
unsigned long long plat_get_syscnt_freq(void)
{
unsigned long long counter_base_frequency;
+#endif /* ERROR_DEPRECATED */
/* Read the frequency from Frequency modes table */
counter_base_frequency = mmio_read_32(ARM_SYS_CNTCTL_BASE + CNTFID_OFF);
@@ -177,4 +192,5 @@ unsigned long long plat_get_syscnt_freq(void)
return counter_base_frequency;
}
+
#endif /* ARM_SYS_CNTCTL_BASE */
diff --git a/plat/mediatek/mt8173/aarch64/platform_common.c b/plat/mediatek/mt8173/aarch64/platform_common.c
index d83e1474..365df1b0 100644
--- a/plat/mediatek/mt8173/aarch64/platform_common.c
+++ b/plat/mediatek/mt8173/aarch64/platform_common.c
@@ -84,7 +84,7 @@ const mmap_region_t plat_mmap[] = {
/* Define EL3 variants of the function initialising the MMU */
DEFINE_CONFIGURE_MMU_EL(3)
-unsigned long long plat_get_syscnt_freq(void)
+unsigned int plat_get_syscnt_freq2(void)
{
return SYS_COUNTER_FREQ_IN_TICKS;
}
diff --git a/plat/nvidia/tegra/include/tegra_private.h b/plat/nvidia/tegra/include/tegra_private.h
index fb47f48f..cf75d9f5 100644
--- a/plat/nvidia/tegra/include/tegra_private.h
+++ b/plat/nvidia/tegra/include/tegra_private.h
@@ -52,7 +52,6 @@ int32_t tegra_soc_validate_power_state(unsigned int power_state,
/* Declarations for plat_setup.c */
const mmap_region_t *plat_get_mmio_map(void);
-unsigned long long plat_get_syscnt_freq(void);
/* Declarations for plat_secondary.c */
void plat_secondary_setup(void);
diff --git a/plat/nvidia/tegra/soc/t132/plat_setup.c b/plat/nvidia/tegra/soc/t132/plat_setup.c
index 5b105057..0d664137 100644
--- a/plat/nvidia/tegra/soc/t132/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t132/plat_setup.c
@@ -74,7 +74,7 @@ const mmap_region_t *plat_get_mmio_map(void)
return tegra_mmap;
}
-unsigned long long plat_get_syscnt_freq(void)
+unsigned int plat_get_syscnt_freq2(void)
{
return 12000000;
}
diff --git a/plat/nvidia/tegra/soc/t210/plat_setup.c b/plat/nvidia/tegra/soc/t210/plat_setup.c
index eecedb36..70a55c69 100644
--- a/plat/nvidia/tegra/soc/t210/plat_setup.c
+++ b/plat/nvidia/tegra/soc/t210/plat_setup.c
@@ -80,7 +80,7 @@ const mmap_region_t *plat_get_mmio_map(void)
/*******************************************************************************
* Handler to get the System Counter Frequency
******************************************************************************/
-unsigned long long plat_get_syscnt_freq(void)
+unsigned int plat_get_syscnt_freq2(void)
{
return 19200000;
}
diff --git a/plat/rockchip/common/aarch64/platform_common.c b/plat/rockchip/common/aarch64/platform_common.c
index ba4d1a41..6e9dab79 100644
--- a/plat/rockchip/common/aarch64/platform_common.c
+++ b/plat/rockchip/common/aarch64/platform_common.c
@@ -75,7 +75,7 @@ static const int cci_map[] = {
/* Define EL3 variants of the function initialising the MMU */
DEFINE_CONFIGURE_MMU_EL(3)
-unsigned long long plat_get_syscnt_freq(void)
+unsigned int plat_get_syscnt_freq2(void)
{
return SYS_COUNTER_FREQ_IN_TICKS;
}
diff --git a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
index 6e5cee31..f89cdce1 100644
--- a/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
+++ b/plat/xilinx/zynqmp/aarch64/zynqmp_common.c
@@ -297,9 +297,9 @@ void zynqmp_config_setup(void)
mmio_write_32(IOU_SCNTRS_CONTROL, IOU_SCNTRS_CONTROL_EN);
}
-unsigned long long plat_get_syscnt_freq(void)
+unsigned int plat_get_syscnt_freq2(void)
{
- unsigned long long counter_base_frequency;
+ unsigned int counter_base_frequency;
/* FIXME: Read the frequency from Frequency modes table */
counter_base_frequency = zynqmp_get_system_timer_freq();