diff options
| author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-12-28 16:11:41 +0900 |
|---|---|---|
| committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-01-18 19:33:41 +0900 |
| commit | 474970535552b1e28b33461429b5492a1f1dd7cd (patch) | |
| tree | 85c85f59bc891864b2b584213bffff755fdc01d8 /plat/xilinx | |
| parent | ecdc898da3f3c01a4034d875219c61357832c12c (diff) | |
Move BL_COHERENT_RAM_BASE/END defines to common_def.h
We have lots of duplicated defines (and comment blocks too).
Move them to include/plat/common/common_def.h.
While we are here, suffix the end address with _END instead of
_LIMIT. The _END is a better fit to indicate the linker-derived
real end address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'plat/xilinx')
| -rw-r--r-- | plat/xilinx/zynqmp/bl31_zynqmp_setup.c | 14 | ||||
| -rw-r--r-- | plat/xilinx/zynqmp/tsp/tsp_plat_setup.c | 14 |
2 files changed, 4 insertions, 24 deletions
diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c index f6c4b98e..c70fc3e4 100644 --- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c +++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c @@ -40,16 +40,6 @@ #define BL31_END (unsigned long)(&__BL31_END__) -/* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols - * refer to page-aligned addresses. - */ -#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) - static entry_point_info_t bl32_image_ep_info; static entry_point_info_t bl33_image_ep_info; @@ -163,7 +153,7 @@ void bl31_plat_arch_setup(void) BL_CODE_END, BL_RO_DATA_BASE, BL_RO_DATA_END, - BL31_COHERENT_RAM_BASE, - BL31_COHERENT_RAM_LIMIT); + BL_COHERENT_RAM_BASE, + BL_COHERENT_RAM_END); enable_mmu_el3(0); } diff --git a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c index cf9ec6ac..6feb5b9d 100644 --- a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c +++ b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c @@ -37,16 +37,6 @@ #define BL32_END (unsigned long)(&__BL32_END__) -/* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to - * page-aligned addresses. - */ -#define BL32_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL32_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) - /******************************************************************************* * Initialize the UART ******************************************************************************/ @@ -84,8 +74,8 @@ void tsp_plat_arch_setup(void) BL_CODE_END, BL_RO_DATA_BASE, BL_RO_DATA_END, - BL32_COHERENT_RAM_BASE, - BL32_COHERENT_RAM_LIMIT + BL_COHERENT_RAM_BASE, + BL_COHERENT_RAM_END ); enable_mmu_el1(0); } |