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authorYann Gautier <yann.gautier@st.com>2019-05-22 19:13:51 +0200
committerYann Gautier <yann.gautier@st.com>2019-09-02 17:51:57 +0200
commite463d3f43e0115fbafd7a17f7ba550fc8e9a2ae0 (patch)
treea0336d26163c963895f97d81ce01a4b5e54837ab /plat/st
parent6cb45f8984af596fc5460204e9be1d85de79cf5e (diff)
stm32mp1: use a common function to check spinlock is available
To use spinlocks, MMU should be enabled, as well as data cache. A common function is created (moved from clock file). It is then used whenever a spinlock has to be taken, in BSEC and clock drivers. Change-Id: I94baed0114a2061ad71bd5287a91bf7f1c6821f6 Signed-off-by: Yann Gautier <yann.gautier@st.com>
Diffstat (limited to 'plat/st')
-rw-r--r--plat/st/common/include/stm32mp_common.h3
-rw-r--r--plat/st/common/stm32mp_common.c8
2 files changed, 11 insertions, 0 deletions
diff --git a/plat/st/common/include/stm32mp_common.h b/plat/st/common/include/stm32mp_common.h
index 0d0a9c66..3dd6c567 100644
--- a/plat/st/common/include/stm32mp_common.h
+++ b/plat/st/common/include/stm32mp_common.h
@@ -30,6 +30,9 @@ uintptr_t stm32mp_pwr_base(void);
/* Return the base address of the RCC peripheral */
uintptr_t stm32mp_rcc_base(void);
+/* Check MMU status to allow spinlock use */
+bool stm32mp_lock_available(void);
+
/* Get IWDG platform instance ID from peripheral IO memory base address */
uint32_t stm32_iwdg_get_instance(uintptr_t base);
diff --git a/plat/st/common/stm32mp_common.c b/plat/st/common/stm32mp_common.c
index f95c7885..5428a74e 100644
--- a/plat/st/common/stm32mp_common.c
+++ b/plat/st/common/stm32mp_common.c
@@ -87,6 +87,14 @@ uintptr_t stm32mp_rcc_base(void)
return rcc_base;
}
+bool stm32mp_lock_available(void)
+{
+ const uint32_t c_m_bits = SCTLR_M_BIT | SCTLR_C_BIT;
+
+ /* The spinlocks are used only when MMU and data cache are enabled */
+ return (read_sctlr() & c_m_bits) == c_m_bits;
+}
+
uintptr_t stm32_get_gpio_bank_base(unsigned int bank)
{
if (bank == GPIO_BANK_Z) {