diff options
author | Yann Gautier <yann.gautier@st.com> | 2019-02-15 17:33:27 +0100 |
---|---|---|
committer | Yann Gautier <yann.gautier@st.com> | 2019-02-20 17:34:21 +0100 |
commit | b053a22e8a538d3ee6114c0ce7f25fa49f0302d8 (patch) | |
tree | f8818474819c18d8dc75d9c36289deeb386be285 /plat/st | |
parent | 774b4a8190ccb73d9c9deefba0c0fd3878be55ce (diff) |
stm32mp1: add minimal support for co-processor Cortex-M4
STM32MP1 chip embeds a dual Cortex-A7 and a Cortex-M4.
The support for Cortex-M4 clocks is added when configuring the clock tree.
Some minimal security features to allow communications between A7 and M4
are also added.
Change-Id: I60417e244a476f60a2758f4969700b2684056665
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Diffstat (limited to 'plat/st')
-rw-r--r-- | plat/st/stm32mp1/bl2_plat_setup.c | 3 | ||||
-rw-r--r-- | plat/st/stm32mp1/stm32mp1_def.h | 1 | ||||
-rw-r--r-- | plat/st/stm32mp1/stm32mp1_security.c | 1 |
3 files changed, 5 insertions, 0 deletions
diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c index c7bc39f4..2477954b 100644 --- a/plat/st/stm32mp1/bl2_plat_setup.c +++ b/plat/st/stm32mp1/bl2_plat_setup.c @@ -202,6 +202,9 @@ void bl2_el3_plat_arch_setup(void) mmio_clrbits_32(rcc_base + RCC_BDCR, RCC_BDCR_VSWRST); } + /* Disable MCKPROT */ + mmio_clrbits_32(rcc_base + RCC_TZCR, RCC_TZCR_MCKPROT); + generic_delay_timer_init(); if (stm32mp1_clk_probe() < 0) { diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h index f0dc575e..1c897bdf 100644 --- a/plat/st/stm32mp1/stm32mp1_def.h +++ b/plat/st/stm32mp1/stm32mp1_def.h @@ -183,6 +183,7 @@ enum ddr_type { #define STM32MP1_TZC_BASE U(0x5C006000) #define STM32MP1_TZC_A7_ID U(0) +#define STM32MP1_TZC_M4_ID U(1) #define STM32MP1_TZC_LCD_ID U(3) #define STM32MP1_TZC_GPU_ID U(4) #define STM32MP1_TZC_MDMA_ID U(5) diff --git a/plat/st/stm32mp1/stm32mp1_security.c b/plat/st/stm32mp1/stm32mp1_security.c index ebf1587a..0ad43e43 100644 --- a/plat/st/stm32mp1/stm32mp1_security.c +++ b/plat/st/stm32mp1/stm32mp1_security.c @@ -41,6 +41,7 @@ static void init_tzc400(void) TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_GPU_ID) | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_LCD_ID) | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_MDMA_ID) | + TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_M4_ID) | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_DMA_ID) | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_USB_HOST_ID) | TZC_REGION_ACCESS_RDWR(STM32MP1_TZC_USB_OTG_ID) | |