diff options
author | Yann Gautier <yann.gautier@st.com> | 2019-01-17 19:17:47 +0100 |
---|---|---|
committer | Yann Gautier <yann.gautier@st.com> | 2019-01-18 15:45:08 +0100 |
commit | 1fc2130c5b8aad9abf54d71ce0124b19f44c69ce (patch) | |
tree | f29fe0872b519a367a978796f72577b6fce3b3f1 /plat/st | |
parent | 59a1cdf16a49ef2bf1a505290cd8b689dfd3e5a1 (diff) |
stm32mp1: update device tree and gpio functions
Change fdt_check_status function to fdt_get_status.
Update GPIO defines.
Move some functions in gpio driver, instead of dt helper file.
Add GPIO bank helper functions.
Use only one status field in dt_node_info structure including both status
and secure status.
Change-Id: I34f93408dd4aac16ae722f564bc3f7d6ae978cf4
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Diffstat (limited to 'plat/st')
-rw-r--r-- | plat/st/stm32mp1/include/stm32mp1_dt.h | 14 | ||||
-rw-r--r-- | plat/st/stm32mp1/include/stm32mp1_private.h | 6 | ||||
-rw-r--r-- | plat/st/stm32mp1/sp_min/sp_min_setup.c | 2 | ||||
-rw-r--r-- | plat/st/stm32mp1/stm32mp1_common.c | 35 | ||||
-rw-r--r-- | plat/st/stm32mp1/stm32mp1_def.h | 48 | ||||
-rw-r--r-- | plat/st/stm32mp1/stm32mp1_dt.c | 221 | ||||
-rw-r--r-- | plat/st/stm32mp1/stm32mp1_helper.S | 36 |
7 files changed, 136 insertions, 226 deletions
diff --git a/plat/st/stm32mp1/include/stm32mp1_dt.h b/plat/st/stm32mp1/include/stm32mp1_dt.h index 19549ee9..d5640c1f 100644 --- a/plat/st/stm32mp1/include/stm32mp1_dt.h +++ b/plat/st/stm32mp1/include/stm32mp1_dt.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -9,12 +9,16 @@ #include <stdbool.h> +#define DT_DISABLED U(0) +#define DT_NON_SECURE U(1) +#define DT_SECURE U(2) +#define DT_SHARED (DT_NON_SECURE | DT_SECURE) + struct dt_node_info { uint32_t base; int32_t clock; int32_t reset; - bool status; - bool sec_status; + uint32_t status; }; /******************************************************************************* @@ -23,13 +27,11 @@ struct dt_node_info { int dt_open_and_check(void); int fdt_get_address(void **fdt_addr); bool fdt_check_node(int node); -bool fdt_check_status(int node); -bool fdt_check_secure_status(int node); +uint32_t fdt_get_status(int node); uint32_t fdt_read_uint32_default(int node, const char *prop_name, uint32_t dflt_value); int fdt_read_uint32_array(int node, const char *prop_name, uint32_t *array, uint32_t count); -int dt_set_pinctrl_config(int node); int dt_set_stdout_pinctrl(void); void dt_fill_device_info(struct dt_node_info *info, int node); int dt_get_node(struct dt_node_info *info, int offset, const char *compat); diff --git a/plat/st/stm32mp1/include/stm32mp1_private.h b/plat/st/stm32mp1/include/stm32mp1_private.h index 3404bc68..04c9a9ad 100644 --- a/plat/st/stm32mp1/include/stm32mp1_private.h +++ b/plat/st/stm32mp1/include/stm32mp1_private.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -21,4 +21,8 @@ uintptr_t stm32mp1_get_boot_ctx_address(void); void stm32mp1_gic_pcpu_init(void); void stm32mp1_gic_init(void); +uintptr_t stm32_get_gpio_bank_base(unsigned int bank); +unsigned long stm32_get_gpio_bank_clock(unsigned int bank); +uint32_t stm32_get_gpio_bank_offset(unsigned int bank); + #endif /* STM32MP1_PRIVATE_H */ diff --git a/plat/st/stm32mp1/sp_min/sp_min_setup.c b/plat/st/stm32mp1/sp_min/sp_min_setup.c index bff45f68..a0bdbf68 100644 --- a/plat/st/stm32mp1/sp_min/sp_min_setup.c +++ b/plat/st/stm32mp1/sp_min/sp_min_setup.c @@ -117,7 +117,7 @@ void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1, result = dt_get_stdout_uart_info(&dt_uart_info); - if ((result > 0) && dt_uart_info.status) { + if ((result > 0) && (dt_uart_info.status != 0U)) { if (console_stm32_register(dt_uart_info.base, 0, STM32MP1_UART_BAUDRATE, &console) == 0) { diff --git a/plat/st/stm32mp1/stm32mp1_common.c b/plat/st/stm32mp1/stm32mp1_common.c index de8cc78c..cd93d2ee 100644 --- a/plat/st/stm32mp1/stm32mp1_common.c +++ b/plat/st/stm32mp1/stm32mp1_common.c @@ -12,6 +12,7 @@ #include <common/bl_common.h> #include <common/debug.h> #include <drivers/arm/gicv2.h> +#include <dt-bindings/clock/stm32mp1-clks.h> #include <lib/mmio.h> #include <lib/xlat_tables/xlat_tables_v2.h> #include <plat/common/platform.h> @@ -86,3 +87,37 @@ uintptr_t stm32mp1_get_boot_ctx_address(void) { return boot_ctx_address; } + +uintptr_t stm32_get_gpio_bank_base(unsigned int bank) +{ + switch (bank) { + case GPIO_BANK_A ... GPIO_BANK_K: + return GPIOA_BASE + (bank * GPIO_BANK_OFFSET); + case GPIO_BANK_Z: + return GPIOZ_BASE; + default: + panic(); + } +} + +/* Return clock ID on success, negative value on error */ +unsigned long stm32_get_gpio_bank_clock(unsigned int bank) +{ + switch (bank) { + case GPIO_BANK_A ... GPIO_BANK_K: + return GPIOA + (bank - GPIO_BANK_A); + case GPIO_BANK_Z: + return GPIOZ; + default: + panic(); + } +} + +uint32_t stm32_get_gpio_bank_offset(unsigned int bank) +{ + if (bank == GPIO_BANK_Z) { + return 0; + } else { + return bank * GPIO_BANK_OFFSET; + } +} diff --git a/plat/st/stm32mp1/stm32mp1_def.h b/plat/st/stm32mp1/stm32mp1_def.h index 25a953da..0dd72157 100644 --- a/plat/st/stm32mp1/stm32mp1_def.h +++ b/plat/st/stm32mp1/stm32mp1_def.h @@ -112,6 +112,39 @@ enum ddr_type { #define PWR_BASE U(0x50001000) /******************************************************************************* + * STM32MP1 GPIO + ******************************************************************************/ +#define GPIOA_BASE U(0x50002000) +#define GPIOB_BASE U(0x50003000) +#define GPIOC_BASE U(0x50004000) +#define GPIOD_BASE U(0x50005000) +#define GPIOE_BASE U(0x50006000) +#define GPIOF_BASE U(0x50007000) +#define GPIOG_BASE U(0x50008000) +#define GPIOH_BASE U(0x50009000) +#define GPIOI_BASE U(0x5000A000) +#define GPIOJ_BASE U(0x5000B000) +#define GPIOK_BASE U(0x5000C000) +#define GPIOZ_BASE U(0x54004000) +#define GPIO_BANK_OFFSET U(0x1000) + +/* Bank IDs used in GPIO driver API */ +#define GPIO_BANK_A U(0) +#define GPIO_BANK_B U(1) +#define GPIO_BANK_C U(2) +#define GPIO_BANK_D U(3) +#define GPIO_BANK_E U(4) +#define GPIO_BANK_F U(5) +#define GPIO_BANK_G U(6) +#define GPIO_BANK_H U(7) +#define GPIO_BANK_I U(8) +#define GPIO_BANK_J U(9) +#define GPIO_BANK_K U(10) +#define GPIO_BANK_Z U(25) + +#define STM32MP_GPIOZ_PIN_MAX_COUNT 8 + +/******************************************************************************* * STM32MP1 UART ******************************************************************************/ #define USART1_BASE U(0x5C000000) @@ -122,8 +155,21 @@ enum ddr_type { #define USART6_BASE U(0x44003000) #define UART7_BASE U(0x40018000) #define UART8_BASE U(0x40019000) +#define STM32MP1_UART_BAUDRATE U(115200) + +/* For UART crash console */ #define STM32MP1_DEBUG_USART_BASE UART4_BASE -#define STM32MP1_UART_BAUDRATE 115200 +/* UART4 on HSI@64MHz, TX on GPIOG11 Alternate 6 */ +#define STM32MP1_DEBUG_USART_CLK_FRQ 64000000 +#define DEBUG_UART_TX_GPIO_BANK_ADDRESS GPIOG_BASE +#define DEBUG_UART_TX_GPIO_BANK_CLK_REG RCC_MP_AHB4ENSETR +#define DEBUG_UART_TX_GPIO_BANK_CLK_EN RCC_MP_AHB4ENSETR_GPIOGEN +#define DEBUG_UART_TX_GPIO_PORT 11 +#define DEBUG_UART_TX_GPIO_ALTERNATE 6 +#define DEBUG_UART_TX_CLKSRC_REG RCC_UART24CKSELR +#define DEBUG_UART_TX_CLKSRC RCC_UART24CKSELR_HSI +#define DEBUG_UART_TX_EN_REG RCC_MP_APB1ENSETR +#define DEBUG_UART_TX_EN RCC_MP_APB1ENSETR_UART4EN /******************************************************************************* * STM32MP1 TZC (TZ400) diff --git a/plat/st/stm32mp1/stm32mp1_dt.c b/plat/st/stm32mp1/stm32mp1_dt.c index 29e936af..8493b878 100644 --- a/plat/st/stm32mp1/stm32mp1_dt.c +++ b/plat/st/stm32mp1/stm32mp1_dt.c @@ -1,10 +1,11 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ #include <assert.h> +#include <errno.h> #include <libfdt.h> @@ -17,135 +18,13 @@ #include <drivers/st/stm32mp1_ddr.h> #include <drivers/st/stm32mp1_ram.h> -#include <stm32mp1_dt.h> - -#define DT_GPIO_BANK_SHIFT 12 -#define DT_GPIO_BANK_MASK 0x1F000U -#define DT_GPIO_PIN_SHIFT 8 -#define DT_GPIO_PIN_MASK 0xF00U -#define DT_GPIO_MODE_MASK 0xFFU - static int fdt_checked; static void *fdt = (void *)(uintptr_t)STM32MP1_DTB_BASE; /******************************************************************************* - * This function gets the pin settings from DT information. - * When analyze and parsing is done, set the GPIO registers. - * Return 0 on success, else return a negative FDT_ERR_xxx error code. - ******************************************************************************/ -static int dt_set_gpio_config(int node) -{ - const fdt32_t *cuint, *slewrate; - int len, pinctrl_node, pinctrl_subnode; - uint32_t i; - uint32_t speed = GPIO_SPEED_LOW; - uint32_t pull = GPIO_NO_PULL; - - cuint = fdt_getprop(fdt, node, "pinmux", &len); - if (cuint == NULL) { - return -FDT_ERR_NOTFOUND; - } - - pinctrl_node = fdt_parent_offset(fdt, fdt_parent_offset(fdt, node)); - if (pinctrl_node < 0) { - return -FDT_ERR_NOTFOUND; - } - - slewrate = fdt_getprop(fdt, node, "slew-rate", NULL); - if (slewrate != NULL) { - speed = fdt32_to_cpu(*slewrate); - } - - if (fdt_getprop(fdt, node, "bias-pull-up", NULL) != NULL) { - pull = GPIO_PULL_UP; - } else if (fdt_getprop(fdt, node, "bias-pull-down", NULL) != NULL) { - pull = GPIO_PULL_DOWN; - } else { - VERBOSE("No bias configured in node %d\n", node); - } - - for (i = 0; i < ((uint32_t)len / sizeof(uint32_t)); i++) { - uint32_t pincfg; - uint32_t bank; - uint32_t pin; - uint32_t mode; - uint32_t alternate = GPIO_ALTERNATE_0; - - pincfg = fdt32_to_cpu(*cuint); - cuint++; - - bank = (pincfg & DT_GPIO_BANK_MASK) >> DT_GPIO_BANK_SHIFT; - - pin = (pincfg & DT_GPIO_PIN_MASK) >> DT_GPIO_PIN_SHIFT; - - mode = pincfg & DT_GPIO_MODE_MASK; - - switch (mode) { - case 0: - mode = GPIO_MODE_INPUT; - break; - case 1 ... 16: - alternate = mode - 1U; - mode = GPIO_MODE_ALTERNATE; - break; - case 17: - mode = GPIO_MODE_ANALOG; - break; - default: - mode = GPIO_MODE_OUTPUT; - break; - } - - if (fdt_getprop(fdt, node, "drive-open-drain", NULL) != NULL) { - mode |= GPIO_OPEN_DRAIN; - } - - fdt_for_each_subnode(pinctrl_subnode, fdt, pinctrl_node) { - uint32_t bank_offset; - const fdt32_t *cuint2; - - if (fdt_getprop(fdt, pinctrl_subnode, - "gpio-controller", NULL) == NULL) { - continue; - } - - cuint2 = fdt_getprop(fdt, pinctrl_subnode, "reg", NULL); - if (cuint2 == NULL) { - continue; - } - - if (bank == GPIO_BANK_Z) { - bank_offset = 0; - } else { - bank_offset = bank * STM32_GPIO_BANK_OFFSET; - } - - if (fdt32_to_cpu(*cuint2) == bank_offset) { - int clk_id = fdt_get_clock_id(pinctrl_subnode); - - if (clk_id < 0) { - return -FDT_ERR_NOTFOUND; - } - - if (stm32mp1_clk_enable((unsigned long)clk_id) < - 0) { - return -FDT_ERR_BADVALUE; - } - - break; - } - } - - set_gpio(bank, pin, mode, speed, pull, alternate); - } - - return 0; -} - -/******************************************************************************* * This function checks device tree file with its header. - * Returns 0 if success, and a negative value else. + * Returns 0 on success and a negative FDT error code on failure. ******************************************************************************/ int dt_open_and_check(void) { @@ -174,7 +53,7 @@ int fdt_get_address(void **fdt_addr) /******************************************************************************* * This function check the presence of a node (generic use of fdt library). - * Returns true if present, false else. + * Returns true if present, else return false. ******************************************************************************/ bool fdt_check_node(int node) { @@ -187,37 +66,30 @@ bool fdt_check_node(int node) } /******************************************************************************* - * This function check the status of a node (generic use of fdt library). - * Returns true if "okay" or missing, false else. + * This function return global node status (generic use of fdt library). ******************************************************************************/ -bool fdt_check_status(int node) +uint32_t fdt_get_status(int node) { + uint32_t status = DT_DISABLED; int len; const char *cchar; cchar = fdt_getprop(fdt, node, "status", &len); - if (cchar == NULL) { - return true; + if ((cchar == NULL) || + (strncmp(cchar, "okay", (size_t)len) == 0)) { + status |= DT_NON_SECURE; } - return strncmp(cchar, "okay", (size_t)len) == 0; -} - -/******************************************************************************* - * This function check the secure-status of a node (generic use of fdt library). - * Returns true if "okay" or missing, false else. - ******************************************************************************/ -bool fdt_check_secure_status(int node) -{ - int len; - const char *cchar; - cchar = fdt_getprop(fdt, node, "secure-status", &len); if (cchar == NULL) { - return true; + if (status == DT_NON_SECURE) { + status |= DT_SECURE; + } + } else if (strncmp(cchar, "okay", (size_t)len) == 0) { + status |= DT_SECURE; } - return strncmp(cchar, "okay", (size_t)len) == 0; + return status; } /******************************************************************************* @@ -245,7 +117,7 @@ uint32_t fdt_read_uint32_default(int node, const char *prop_name, * (generic use of fdt library). * It reads the values inside the device tree, from property name and node. * The number of parameters is also indicated as entry parameter. - * Returns 0 if success, and a negative value else. + * Returns 0 on success and a negative FDT error code on failure. * If success, values are stored at the third parameter address. ******************************************************************************/ int fdt_read_uint32_array(int node, const char *prop_name, uint32_t *array, @@ -274,52 +146,9 @@ int fdt_read_uint32_array(int node, const char *prop_name, uint32_t *array, } /******************************************************************************* - * This function gets the pin settings from DT information. - * When analyze and parsing is done, set the GPIO registers. - * Returns 0 if success, and a negative value else. - ******************************************************************************/ -int dt_set_pinctrl_config(int node) -{ - const fdt32_t *cuint; - int lenp = 0; - uint32_t i; - - if (!fdt_check_status(node)) { - return -FDT_ERR_NOTFOUND; - } - - cuint = fdt_getprop(fdt, node, "pinctrl-0", &lenp); - if (cuint == NULL) { - return -FDT_ERR_NOTFOUND; - } - - for (i = 0; i < ((uint32_t)lenp / 4U); i++) { - int phandle_node, phandle_subnode; - - phandle_node = - fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*cuint)); - if (phandle_node < 0) { - return -FDT_ERR_NOTFOUND; - } - - fdt_for_each_subnode(phandle_subnode, fdt, phandle_node) { - int ret = dt_set_gpio_config(phandle_subnode); - - if (ret < 0) { - return ret; - } - } - - cuint++; - } - - return 0; -} - -/******************************************************************************* * This function gets the stdout pin configuration information from the DT. * And then calls the sub-function to treat it and set GPIO registers. - * Returns 0 if success, and a negative value else. + * Returns 0 on success and a negative FDT error code on failure. ******************************************************************************/ int dt_set_stdout_pinctrl(void) { @@ -363,13 +192,12 @@ void dt_fill_device_info(struct dt_node_info *info, int node) info->reset = -1; } - info->status = fdt_check_status(node); - info->sec_status = fdt_check_secure_status(node); + info->status = fdt_get_status(node); } /******************************************************************************* * This function retrieve the generic information from DT. - * Returns node if success, and a negative value else. + * Returns node on success and a negative FDT error code on failure. ******************************************************************************/ int dt_get_node(struct dt_node_info *info, int offset, const char *compat) { @@ -387,7 +215,7 @@ int dt_get_node(struct dt_node_info *info, int offset, const char *compat) /******************************************************************************* * This function gets the UART instance info of stdout from the DT. - * Returns node if success, and a negative value else. + * Returns node on success and a negative FDT error code on failure. ******************************************************************************/ int dt_get_stdout_uart_info(struct dt_node_info *info) { @@ -448,7 +276,7 @@ int dt_get_stdout_node_offset(void) /******************************************************************************* * This function gets DDR size information from the DT. - * Returns value in bytes if success, and STM32MP1_DDR_SIZE_DFLT else. + * Returns value in bytes on success, and 0 on failure. ******************************************************************************/ uint32_t dt_get_ddr_size(void) { @@ -457,11 +285,10 @@ uint32_t dt_get_ddr_size(void) node = fdt_node_offset_by_compatible(fdt, -1, DT_DDR_COMPAT); if (node < 0) { INFO("%s: Cannot read DDR node in DT\n", __func__); - return STM32MP1_DDR_SIZE_DFLT; + return 0; } - return fdt_read_uint32_default(node, "st,mem-size", - STM32MP1_DDR_SIZE_DFLT); + return fdt_read_uint32_default(node, "st,mem-size", 0); } /******************************************************************************* diff --git a/plat/st/stm32mp1/stm32mp1_helper.S b/plat/st/stm32mp1/stm32mp1_helper.S index 61c587f4..8c2e1b6e 100644 --- a/plat/st/stm32mp1/stm32mp1_helper.S +++ b/plat/st/stm32mp1/stm32mp1_helper.S @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -12,11 +12,8 @@ #include <drivers/st/stm32_gpio.h> #include <drivers/st/stm32mp1_rcc.h> -#define GPIO_BANK_G_ADDRESS 0x50008000 -#define GPIO_TX_PORT 11 -#define GPIO_TX_SHIFT (GPIO_TX_PORT << 1) -#define GPIO_TX_ALT_SHIFT ((GPIO_TX_PORT - GPIO_ALT_LOWER_LIMIT) << 2) -#define STM32MP1_HSI_CLK 64000000 +#define GPIO_TX_SHIFT (DEBUG_UART_TX_GPIO_PORT << 1) +#define GPIO_TX_ALT_SHIFT ((DEBUG_UART_TX_GPIO_PORT - GPIO_ALT_LOWER_LIMIT) << 2) .globl platform_mem_init .globl plat_report_exception @@ -112,13 +109,13 @@ endfunc plat_my_core_pos * --------------------------------------------- */ func plat_crash_console_init - /* Enable GPIOs for UART4 TX */ - ldr r1, =(RCC_BASE + RCC_MP_AHB4ENSETR) + /* Enable GPIOs for UART TX */ + ldr r1, =(RCC_BASE + DEBUG_UART_TX_GPIO_BANK_CLK_REG) ldr r2, [r1] - /* Configure GPIO G11 */ - orr r2, r2, #RCC_MP_AHB4ENSETR_GPIOGEN + /* Configure GPIO */ + orr r2, r2, #DEBUG_UART_TX_GPIO_BANK_CLK_EN str r2, [r1] - ldr r1, =GPIO_BANK_G_ADDRESS + ldr r1, =DEBUG_UART_TX_GPIO_BANK_ADDRESS /* Set GPIO mode alternate */ ldr r2, [r1, #GPIO_MODE_OFFSET] bic r2, r2, #(GPIO_MODE_MASK << GPIO_TX_SHIFT) @@ -132,23 +129,22 @@ func plat_crash_console_init ldr r2, [r1, #GPIO_PUPD_OFFSET] bic r2, r2, #(GPIO_PULL_MASK << GPIO_TX_SHIFT) str r2, [r1, #GPIO_PUPD_OFFSET] - /* Set alternate AF6 */ + /* Set alternate */ ldr r2, [r1, #GPIO_AFRH_OFFSET] bic r2, r2, #(GPIO_ALTERNATE_MASK << GPIO_TX_ALT_SHIFT) - orr r2, r2, #(GPIO_ALTERNATE_6 << GPIO_TX_ALT_SHIFT) + orr r2, r2, #(DEBUG_UART_TX_GPIO_ALTERNATE << GPIO_TX_ALT_SHIFT) str r2, [r1, #GPIO_AFRH_OFFSET] - - /* Enable UART clock, with HSI source */ - ldr r1, =(RCC_BASE + RCC_UART24CKSELR) - mov r2, #RCC_UART24CKSELR_HSI + /* Enable UART clock, with its source */ + ldr r1, =(RCC_BASE + DEBUG_UART_TX_CLKSRC_REG) + mov r2, #DEBUG_UART_TX_CLKSRC str r2, [r1] - ldr r1, =(RCC_BASE + RCC_MP_APB1ENSETR) + ldr r1, =(RCC_BASE + DEBUG_UART_TX_EN_REG) ldr r2, [r1] - orr r2, r2, #RCC_MP_APB1ENSETR_UART4EN + orr r2, r2, #DEBUG_UART_TX_EN str r2, [r1] ldr r0, =STM32MP1_DEBUG_USART_BASE - ldr r1, =STM32MP1_HSI_CLK + ldr r1, =STM32MP1_DEBUG_USART_CLK_FRQ ldr r2, =STM32MP1_UART_BAUDRATE b console_stm32_core_init endfunc plat_crash_console_init |