diff options
| author | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2018-12-29 19:40:31 +0100 |
|---|---|---|
| committer | Ard Biesheuvel <ard.biesheuvel@linaro.org> | 2019-01-15 17:51:23 +0100 |
| commit | e373b6a28c34f81ac5681a7e03de5b95e269b192 (patch) | |
| tree | 782930152f7270079993516c545b014d482f18ea /plat/socionext | |
| parent | 32e83537489267a8941f64caa58c0fa56d6b2c7e (diff) | |
plat/synquacer: enable OP-TEE logic only if SPD_opteed is set
The logic that initializes the BL32 entry point data structure
should only be executed if we are in fact loading OP-TEE, and
not if BL32_BASE is set for other reasons (i.e., when enabling
SPM)
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Diffstat (limited to 'plat/socionext')
| -rw-r--r-- | plat/socionext/synquacer/include/platform_def.h | 2 | ||||
| -rw-r--r-- | plat/socionext/synquacer/platform.mk | 4 | ||||
| -rw-r--r-- | plat/socionext/synquacer/sq_bl31_setup.c | 4 |
3 files changed, 4 insertions, 6 deletions
diff --git a/plat/socionext/synquacer/include/platform_def.h b/plat/socionext/synquacer/include/platform_def.h index de6be7d2..c5bf7d5a 100644 --- a/plat/socionext/synquacer/include/platform_def.h +++ b/plat/socionext/synquacer/include/platform_def.h @@ -38,6 +38,8 @@ #define BL31_SIZE 0x00080000 #define BL31_LIMIT (BL31_BASE + BL31_SIZE) +#define BL32_BASE 0xfc000000 + #define PLAT_SQ_CCN_BASE 0x32000000 #define PLAT_SQ_CLUSTER_TO_CCN_ID_MAP \ 0, /* Cluster 0 */ \ diff --git a/plat/socionext/synquacer/platform.mk b/plat/socionext/synquacer/platform.mk index 1bee20ab..ff460565 100644 --- a/plat/socionext/synquacer/platform.mk +++ b/plat/socionext/synquacer/platform.mk @@ -17,10 +17,6 @@ ERRATA_A53_855873 := 1 # Libraries include lib/xlat_tables_v2/xlat_tables.mk -ifeq (${SPD},opteed) -TF_CFLAGS_aarch64 += -DBL32_BASE=0xfc000000 -endif - PLAT_PATH := plat/socionext/synquacer PLAT_INCLUDES := -I$(PLAT_PATH)/include \ -I$(PLAT_PATH)/drivers/scpi \ diff --git a/plat/socionext/synquacer/sq_bl31_setup.c b/plat/socionext/synquacer/sq_bl31_setup.c index f8d25262..cb711862 100644 --- a/plat/socionext/synquacer/sq_bl31_setup.c +++ b/plat/socionext/synquacer/sq_bl31_setup.c @@ -76,7 +76,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, /* Initialize power controller before setting up topology */ plat_sq_pwrc_setup(); -#ifdef BL32_BASE +#ifdef SPD_opteed struct draminfo di = {0}; scpi_get_draminfo(&di); @@ -98,7 +98,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, } else { NOTICE("OP-TEE has not been loaded by SCP firmware\n"); } -#endif /* BL32_BASE */ +#endif /* SPD_opteed */ /* Populate entry point information for BL33 */ SET_PARAM_HEAD(&bl33_image_ep_info, |