diff options
author | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-09-29 11:14:02 +0100 |
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committer | Jeenu Viswambharan <jeenu.viswambharan@arm.com> | 2017-10-16 16:50:02 +0100 |
commit | a982f437b1104683bf22bd3a027ab7719d2e2b87 (patch) | |
tree | 220ad0205924399101ec8ebd6b917609274de1a5 /plat/socionext | |
parent | b2c363b1321348383347a48982d14922c559ad92 (diff) |
uniphier: Migrate to using interrupt properties
Change-Id: I795ec540942130b5ddc0fa1fd7167f7e1d1ae967
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'plat/socionext')
-rw-r--r-- | plat/socionext/uniphier/uniphier_gicv3.c | 63 |
1 files changed, 39 insertions, 24 deletions
diff --git a/plat/socionext/uniphier/uniphier_gicv3.c b/plat/socionext/uniphier/uniphier_gicv3.c index 05a4e35f..93bc73ac 100644 --- a/plat/socionext/uniphier/uniphier_gicv3.c +++ b/plat/socionext/uniphier/uniphier_gicv3.c @@ -6,6 +6,7 @@ #include <assert.h> #include <gicv3.h> +#include <interrupt_props.h> #include <platform.h> #include <platform_def.h> @@ -13,19 +14,39 @@ static uintptr_t uniphier_rdistif_base_addrs[PLATFORM_CORE_COUNT]; -static const unsigned int g0_interrupt_array[] = { - 8, /* SGI0 */ - 14, /* SGI6 */ -}; +static const interrupt_prop_t uniphier_interrupt_props[] = { + /* G0 interrupts */ + + /* SGI0 */ + INTR_PROP_DESC(8, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP0, + GIC_INTR_CFG_EDGE), + /* SGI6 */ + INTR_PROP_DESC(14, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP0, + GIC_INTR_CFG_EDGE), + + /* G1S interrupts */ -static const unsigned int g1s_interrupt_array[] = { - 29, /* Timer */ - 9, /* SGI1 */ - 10, /* SGI2 */ - 11, /* SGI3 */ - 12, /* SGI4 */ - 13, /* SGI5 */ - 15, /* SGI7 */ + /* Timer */ + INTR_PROP_DESC(29, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S, + GIC_INTR_CFG_LEVEL), + /* SGI1 */ + INTR_PROP_DESC(9, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S, + GIC_INTR_CFG_EDGE), + /* SGI2 */ + INTR_PROP_DESC(10, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S, + GIC_INTR_CFG_EDGE), + /* SGI3 */ + INTR_PROP_DESC(11, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S, + GIC_INTR_CFG_EDGE), + /* SGI4 */ + INTR_PROP_DESC(12, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S, + GIC_INTR_CFG_EDGE), + /* SGI5 */ + INTR_PROP_DESC(13, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S, + GIC_INTR_CFG_EDGE), + /* SGI7 */ + INTR_PROP_DESC(15, GIC_HIGHEST_SEC_PRIORITY, INTR_GROUP1S, + GIC_INTR_CFG_EDGE) }; static unsigned int uniphier_mpidr_to_core_pos(u_register_t mpidr) @@ -37,10 +58,8 @@ static const struct gicv3_driver_data uniphier_gic_driver_data[] = { [UNIPHIER_SOC_LD11] = { .gicd_base = 0x5fe00000, .gicr_base = 0x5fe40000, - .g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array), - .g1s_interrupt_num = ARRAY_SIZE(g1s_interrupt_array), - .g0_interrupt_array = g0_interrupt_array, - .g1s_interrupt_array = g1s_interrupt_array, + .interrupt_props = uniphier_interrupt_props, + .interrupt_props_num = ARRAY_SIZE(uniphier_interrupt_props), .rdistif_num = PLATFORM_CORE_COUNT, .rdistif_base_addrs = uniphier_rdistif_base_addrs, .mpidr_to_core_pos = uniphier_mpidr_to_core_pos, @@ -48,10 +67,8 @@ static const struct gicv3_driver_data uniphier_gic_driver_data[] = { [UNIPHIER_SOC_LD20] = { .gicd_base = 0x5fe00000, .gicr_base = 0x5fe80000, - .g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array), - .g1s_interrupt_num = ARRAY_SIZE(g1s_interrupt_array), - .g0_interrupt_array = g0_interrupt_array, - .g1s_interrupt_array = g1s_interrupt_array, + .interrupt_props = uniphier_interrupt_props, + .interrupt_props_num = ARRAY_SIZE(uniphier_interrupt_props), .rdistif_num = PLATFORM_CORE_COUNT, .rdistif_base_addrs = uniphier_rdistif_base_addrs, .mpidr_to_core_pos = uniphier_mpidr_to_core_pos, @@ -59,10 +76,8 @@ static const struct gicv3_driver_data uniphier_gic_driver_data[] = { [UNIPHIER_SOC_PXS3] = { .gicd_base = 0x5fe00000, .gicr_base = 0x5fe80000, - .g0_interrupt_num = ARRAY_SIZE(g0_interrupt_array), - .g1s_interrupt_num = ARRAY_SIZE(g1s_interrupt_array), - .g0_interrupt_array = g0_interrupt_array, - .g1s_interrupt_array = g1s_interrupt_array, + .interrupt_props = uniphier_interrupt_props, + .interrupt_props_num = ARRAY_SIZE(uniphier_interrupt_props), .rdistif_num = PLATFORM_CORE_COUNT, .rdistif_base_addrs = uniphier_rdistif_base_addrs, .mpidr_to_core_pos = uniphier_mpidr_to_core_pos, |