diff options
| author | Derek Basehore <dbasehore@chromium.org> | 2017-02-09 22:08:48 -0800 |
|---|---|---|
| committer | Xing Zheng <zhengxing@rock-chips.com> | 2017-02-24 20:07:45 +0800 |
| commit | cdb6d5e56494726c2a0ebbc97eb3d802fbefe372 (patch) | |
| tree | 01f29ebc6cdcb0fbe1caccb4b881089ced0e9d68 /plat/rockchip | |
| parent | 5a5dc61713fd563a3bb8a89bd26729f4348bb5d6 (diff) | |
rockchip: rk3399: Use tFC value instead of tRFC value
This fixes code that set a tFC value in a register using the tRFC
value instead.
Signed-off-by: Derek Basehore <dbasehore@chromium.org>
Diffstat (limited to 'plat/rockchip')
| -rw-r--r-- | plat/rockchip/rk3399/drivers/dram/dfs.c | 5 | ||||
| -rw-r--r-- | plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c | 6 |
2 files changed, 9 insertions, 2 deletions
diff --git a/plat/rockchip/rk3399/drivers/dram/dfs.c b/plat/rockchip/rk3399/drivers/dram/dfs.c index 98ecd51d..f589a8ad 100644 --- a/plat/rockchip/rk3399/drivers/dram/dfs.c +++ b/plat/rockchip/rk3399/drivers/dram/dfs.c @@ -1183,7 +1183,8 @@ static void gen_rk3399_pi_params_f0(struct timing_related_config *timing_config, mmio_clrsetbits_32(PI_REG(i, 148), 0xffff << 16, pdram_timing->mr[2] << 16); /* PI_156 PI_TFC_F0:RW:0:10 */ - mmio_clrsetbits_32(PI_REG(i, 156), 0x3ff, pdram_timing->trfc); + mmio_clrsetbits_32(PI_REG(i, 156), 0x3ff, + pdram_timing->tfc_long); /* PI_158 PI_TWR_F0:RW:24:6 */ mmio_clrsetbits_32(PI_REG(i, 158), 0x3f << 24, pdram_timing->twr << 24); @@ -1363,7 +1364,7 @@ static void gen_rk3399_pi_params_f1(struct timing_related_config *timing_config, mmio_clrsetbits_32(PI_REG(i, 151), 0xffff, pdram_timing->mr[2]); /* PI_156 PI_TFC_F1:RW:16:10 */ mmio_clrsetbits_32(PI_REG(i, 156), 0x3ff << 16, - pdram_timing->trfc << 16); + pdram_timing->tfc_long << 16); /* PI_162 PI_TWR_F1:RW:8:6 */ mmio_clrsetbits_32(PI_REG(i, 162), 0x3f << 8, pdram_timing->twr << 8); diff --git a/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c b/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c index b18c597c..8a5704e3 100644 --- a/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c +++ b/plat/rockchip/rk3399/drivers/dram/dram_spec_timing.c @@ -666,6 +666,9 @@ static void lpddr2_get_parameter(struct timing_related_config *timing_config, #define LPDDR3_TADR (20) /* ns */ #define LPDDR3_TMRZ (3) /* ns */ +/* FSP */ +#define LPDDR3_TFC_LONG (250) /* ns */ + /* * Description: depend on input parameter "timing_config", * and calculate all lpddr3 @@ -879,6 +882,9 @@ static void lpddr3_get_parameter(struct timing_related_config *timing_config, pdram_timing->tadr = (LPDDR3_TADR * nmhz + 999) / 1000; pdram_timing->tmrz = (LPDDR3_TMRZ * nmhz + 999) / 1000; pdram_timing->tcacd = pdram_timing->tadr + 2; + + /* FSP */ + pdram_timing->tfc_long = (LPDDR3_TFC_LONG * nmhz + 999) / 1000; } #define LPDDR4_TINIT1 (200000) /* 200us */ |