diff options
| author | Lin Huang <hl@rock-chips.com> | 2017-05-27 17:47:01 +0800 |
|---|---|---|
| committer | Caesar Wang <wxt@rock-chips.com> | 2017-08-29 15:35:29 +0800 |
| commit | a7bb3388b1117da48eb0cc77c7512560be56221b (patch) | |
| tree | 2c701f36dc8444afc71b47e91950f25695775e47 /plat/rockchip | |
| parent | 4c3770d9cfc1b4710809c88afd87c10e27f30bd8 (diff) | |
rockchip/rk3399: do secure timer init in pmusram
we will use timer in pmusarm, when logic power rail shutdown,
the secure timer will gone, so need to initial it in pmusram.
Change-Id: I472e7eec3fc197f56223e6fff9167556c1c5e3bc
Signed-off-by: Lin Huang <hl@rock-chips.com>
Diffstat (limited to 'plat/rockchip')
| -rw-r--r-- | plat/rockchip/rk3399/drivers/dram/suspend.c | 2 | ||||
| -rw-r--r-- | plat/rockchip/rk3399/drivers/secure/secure.c | 13 | ||||
| -rw-r--r-- | plat/rockchip/rk3399/drivers/secure/secure.h | 1 |
3 files changed, 16 insertions, 0 deletions
diff --git a/plat/rockchip/rk3399/drivers/dram/suspend.c b/plat/rockchip/rk3399/drivers/dram/suspend.c index 7d4abf0f..f66150ae 100644 --- a/plat/rockchip/rk3399/drivers/dram/suspend.c +++ b/plat/rockchip/rk3399/drivers/dram/suspend.c @@ -726,6 +726,8 @@ __pmusramfunc void dmc_resume(void) uint32_t channel_mask = 0; uint32_t channel; + sram_secure_timer_init(); + /* * we switch ddr clock to abpll when suspend, * we set back to dpll here diff --git a/plat/rockchip/rk3399/drivers/secure/secure.c b/plat/rockchip/rk3399/drivers/secure/secure.c index 6b4f3b89..589d833c 100644 --- a/plat/rockchip/rk3399/drivers/secure/secure.c +++ b/plat/rockchip/rk3399/drivers/secure/secure.c @@ -101,6 +101,19 @@ void secure_watchdog_enable(void) WMSK_BIT(PCLK_WDT_CM0_GATE_SHIFT)); } +__pmusramfunc void sram_secure_timer_init(void) +{ + mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_END_COUNT0, 0xffffffff); + mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_END_COUNT1, 0xffffffff); + + mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_INIT_COUNT0, 0x0); + mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_INIT_COUNT0, 0x0); + + /* auto reload & enable the timer */ + mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_CONTROL_REG, + TIMER_EN | TIMER_FMODE); +} + void secure_timer_init(void) { mmio_write_32(STIMER1_CHN_BASE(5) + TIMER_END_COUNT0, 0xffffffff); diff --git a/plat/rockchip/rk3399/drivers/secure/secure.h b/plat/rockchip/rk3399/drivers/secure/secure.h index 7784ae76..334805d0 100644 --- a/plat/rockchip/rk3399/drivers/secure/secure.h +++ b/plat/rockchip/rk3399/drivers/secure/secure.h @@ -100,5 +100,6 @@ void secure_watchdog_enable(void); void secure_timer_init(void); void secure_sgrf_init(void); void secure_sgrf_ddr_rgn_init(void); +__pmusramfunc void sram_secure_timer_init(void); #endif /* __PLAT_ROCKCHIP_RK3399_DRIVER_SECURE_H__ */ |