diff options
| author | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2018-02-19 13:53:48 +0000 |
|---|---|---|
| committer | Antonio Nino Diaz <antonio.ninodiaz@arm.com> | 2018-02-21 13:54:55 +0000 |
| commit | 6bf0e079303545ad6dd314ce3e7cb3a11dcec413 (patch) | |
| tree | 25ea1d115147da95470962d9098063ed770a750d /plat/rockchip | |
| parent | 5ff5a6d9c33fdf8b626a4e61066f467f2b5c75a9 (diff) | |
Ensure the correct execution of TLBI instructions
After executing a TLBI a DSB is needed to ensure completion of the
TLBI.
rk3328: The MMU is allowed to load TLB entries for as long as it is
enabled. Because of this, the correct place to execute a TLBI is right
after disabling the MMU.
Change-Id: I8280f248d10b49a8c354a4ccbdc8f8345ac4c170
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
Diffstat (limited to 'plat/rockchip')
| -rw-r--r-- | plat/rockchip/rk3328/drivers/pmu/pmu.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/plat/rockchip/rk3328/drivers/pmu/pmu.c b/plat/rockchip/rk3328/drivers/pmu/pmu.c index f576fe41..835c3a6b 100644 --- a/plat/rockchip/rk3328/drivers/pmu/pmu.c +++ b/plat/rockchip/rk3328/drivers/pmu/pmu.c @@ -591,8 +591,10 @@ err_loop: __sramfunc void sram_suspend(void) { /* disable mmu and icache */ - tlbialle3(); disable_mmu_icache_el3(); + tlbialle3(); + dsbsy(); + isb(); mmio_write_32(SGRF_BASE + SGRF_SOC_CON(1), ((uintptr_t)&pmu_cpuson_entrypoint >> CPU_BOOT_ADDR_ALIGN) | |