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authordavidcunado-arm <david.cunado@arm.com>2016-10-26 09:54:36 +0100
committerGitHub <noreply@github.com>2016-10-26 09:54:36 +0100
commitad09652c41c96cca97cd95a59cdb72644717285d (patch)
tree231ce58d31e256fd10e9c3acd4aa77e56de7ffba /plat/rockchip/common
parentf4d1312c8bdf967517fcf590aca15bfa669bbaa9 (diff)
parent7ac520067cd35c1f8754e8caa3c128715a56a4c3 (diff)
Merge pull request #724 from rockchip-linux/support-rk3399-sdram
rockchip: optimize the link mechanism for SRAM code
Diffstat (limited to 'plat/rockchip/common')
-rw-r--r--plat/rockchip/common/aarch64/platform_common.c1
-rw-r--r--plat/rockchip/common/bl31_plat_setup.c4
-rw-r--r--plat/rockchip/common/include/plat_private.h12
-rw-r--r--plat/rockchip/common/plat_pm.c13
-rw-r--r--plat/rockchip/common/pmusram/pmu_sram.c33
-rw-r--r--plat/rockchip/common/pmusram/pmu_sram.h11
6 files changed, 47 insertions, 27 deletions
diff --git a/plat/rockchip/common/aarch64/platform_common.c b/plat/rockchip/common/aarch64/platform_common.c
index 40cd29e3..ff470163 100644
--- a/plat/rockchip/common/aarch64/platform_common.c
+++ b/plat/rockchip/common/aarch64/platform_common.c
@@ -68,6 +68,7 @@ static const int cci_map[] = {
coh_limit - coh_start, \
MT_DEVICE | MT_RW | MT_SECURE); \
mmap_add(plat_rk_mmap); \
+ rockchip_plat_sram_mmu_el##_el(); \
init_xlat_tables(); \
\
enable_mmu_el ## _el(0); \
diff --git a/plat/rockchip/common/bl31_plat_setup.c b/plat/rockchip/common/bl31_plat_setup.c
index 47a245a6..b073bde2 100644
--- a/plat/rockchip/common/bl31_plat_setup.c
+++ b/plat/rockchip/common/bl31_plat_setup.c
@@ -115,10 +115,6 @@ void bl31_early_platform_setup(bl31_params_t *from_bl2,
bl32_ep_info = *from_bl2->bl32_ep_info;
bl33_ep_info = *from_bl2->bl33_ep_info;
- /*
- * The code for resuming cpu from suspend must be excuted in pmusram.
- * Copy the code into pmusram.
- */
plat_rockchip_pmusram_prepare();
/* there may have some board sepcific message need to initialize */
diff --git a/plat/rockchip/common/include/plat_private.h b/plat/rockchip/common/include/plat_private.h
index ad012666..a093e792 100644
--- a/plat/rockchip/common/include/plat_private.h
+++ b/plat/rockchip/common/include/plat_private.h
@@ -37,6 +37,14 @@
#include <xlat_tables.h>
#include <psci.h>
+#define __sramdata __attribute__((section(".sram.data")))
+#define __sramconst __attribute__((section(".sram.rodata")))
+#define __sramfunc __attribute__((section(".sram.text"))) \
+ __attribute__((noinline))
+
+extern uint32_t __bl31_sram_text_start, __bl31_sram_text_end;
+extern uint32_t __bl31_sram_data_start, __bl31_sram_data_end;
+
/******************************************************************************
* For rockchip socs pm ops
******************************************************************************/
@@ -135,6 +143,10 @@ extern uint64_t cpuson_entry_point[PLATFORM_CORE_COUNT];
extern uint32_t cpuson_flags[PLATFORM_CORE_COUNT];
extern const mmap_region_t plat_rk_mmap[];
+
+void rockchip_plat_sram_mmu_el3(void);
+void plat_rockchip_mem_prepare(void);
+
#endif /* __ASSEMBLY__ */
/******************************************************************************
diff --git a/plat/rockchip/common/plat_pm.c b/plat/rockchip/common/plat_pm.c
index d28100d9..e926345b 100644
--- a/plat/rockchip/common/plat_pm.c
+++ b/plat/rockchip/common/plat_pm.c
@@ -317,18 +317,6 @@ static void __dead2 rockchip_system_poweroff(void)
rockchip_ops->system_off();
}
-static void
-__dead2 rockchip_pwr_domain_pwr_down_wfi(const psci_power_state_t *target_state)
-{
- if ((RK_CORE_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE) &&
- (rockchip_ops)) {
- if (RK_SYSTEM_PWR_STATE(target_state) == PLAT_MAX_OFF_STATE &&
- rockchip_ops->sys_pwr_down_wfi)
- rockchip_ops->sys_pwr_down_wfi(target_state);
- }
- psci_power_down_wfi();
-}
-
/*******************************************************************************
* Export the platform handlers via plat_rockchip_psci_pm_ops. The rockchip
* standard
@@ -341,7 +329,6 @@ const plat_psci_ops_t plat_rockchip_psci_pm_ops = {
.pwr_domain_suspend = rockchip_pwr_domain_suspend,
.pwr_domain_on_finish = rockchip_pwr_domain_on_finish,
.pwr_domain_suspend_finish = rockchip_pwr_domain_suspend_finish,
- .pwr_domain_pwr_down_wfi = rockchip_pwr_domain_pwr_down_wfi,
.system_reset = rockchip_system_reset,
.system_off = rockchip_system_poweroff,
.validate_power_state = rockchip_validate_power_state,
diff --git a/plat/rockchip/common/pmusram/pmu_sram.c b/plat/rockchip/common/pmusram/pmu_sram.c
index bea48754..5c6a6e65 100644
--- a/plat/rockchip/common/pmusram/pmu_sram.c
+++ b/plat/rockchip/common/pmusram/pmu_sram.c
@@ -24,7 +24,10 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
+#include <console.h>
+#include <debug.h>
#include <platform.h>
+#include <plat_private.h>
/*****************************************************************************
* sram only surpport 32-bits access
@@ -36,3 +39,33 @@ void u32_align_cpy(uint32_t *dst, const uint32_t *src, size_t bytes)
for (i = 0; i < bytes; i++)
dst[i] = src[i];
}
+
+void rockchip_plat_sram_mmu_el3(void)
+{
+#ifdef PLAT_EXTRA_LD_SCRIPT
+ size_t sram_size;
+
+ /* sram.text size */
+ sram_size = (char *)&__bl31_sram_text_end -
+ (char *)&__bl31_sram_text_start;
+ mmap_add_region((unsigned long)&__bl31_sram_text_start,
+ (unsigned long)&__bl31_sram_text_start,
+ sram_size, MT_MEMORY | MT_RO | MT_SECURE);
+
+ /* sram.data size */
+ sram_size = (char *)&__bl31_sram_data_end -
+ (char *)&__bl31_sram_data_start;
+ mmap_add_region((unsigned long)&__bl31_sram_data_start,
+ (unsigned long)&__bl31_sram_data_start,
+ sram_size, MT_MEMORY | MT_RW | MT_SECURE);
+#else
+ /* TODO: Support other SoCs, Just support RK3399 now */
+ return;
+#endif
+}
+
+void plat_rockchip_mem_prepare(void)
+{
+ /* The code for resuming cpu from suspend must be excuted in pmusram */
+ plat_rockchip_pmusram_prepare();
+}
diff --git a/plat/rockchip/common/pmusram/pmu_sram.h b/plat/rockchip/common/pmusram/pmu_sram.h
index f2904612..ec2d3416 100644
--- a/plat/rockchip/common/pmusram/pmu_sram.h
+++ b/plat/rockchip/common/pmusram/pmu_sram.h
@@ -45,16 +45,6 @@
#ifndef __ASSEMBLY__
-/*
- * The struct is used in pmu_cpus_on.S which
- * gets the data of the struct by the following index
- * #define PSRAM_DT_SP 0x0
- * #define PSRAM_DT_DDR_FUNC 0x8
- * #define PSRAM_DT_DDR_DATA 0x10
- * #define PSRAM_DT_DDRFLAG 0x18
- * #define PSRAM_DT_SYS_MODE 0x1c
- * #define PSRAM_DT_MPIDR 0x20
- */
struct psram_data_t {
uint64_t sp;
uint64_t ddr_func;
@@ -76,6 +66,7 @@ CASSERT(__builtin_offsetof(struct psram_data_t, ddr_flag) == PSRAM_DT_DDRFLAG,
CASSERT(__builtin_offsetof(struct psram_data_t, boot_mpidr) == PSRAM_DT_MPIDR,
assert_psram_dt_mpidr_offset_mistmatch);
void u32_align_cpy(uint32_t *dst, const uint32_t *src, size_t bytes);
+
#endif /* __ASSEMBLY__ */
#endif