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| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-08-07 18:19:26 +0200 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-08-29 13:02:30 +0200 |
| commit | f12039be9532f4ff1e9bc01feda61e9b3bb31667 (patch) | |
| tree | 838dce33e8a35bee6712ff7d91c24bdc1477bc5b /plat/renesas | |
| parent | 40c711a3608e5529bb212c97afc24caebc7fe2ac (diff) | |
rcar_get3: drivers: ddr: Partly unify register macros between DDR A and B
The ddr_a and ddr_b register macros are the same for the most part,
unify them into a single header.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Change-Id: I8f55d6d779837215339ac0010e8c8ab5f6748d75
Diffstat (limited to 'plat/renesas')
| -rw-r--r-- | plat/renesas/rcar/include/rcar_def.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/plat/renesas/rcar/include/rcar_def.h b/plat/renesas/rcar/include/rcar_def.h index e2dae9bc..0ffbfe97 100644 --- a/plat/renesas/rcar/include/rcar_def.h +++ b/plat/renesas/rcar/include/rcar_def.h @@ -221,9 +221,11 @@ #define CPG_PLL0CR (CPG_BASE + 0x00D8U) #define CPG_PLL2CR (CPG_BASE + 0x002CU) #define CPG_PLL4CR (CPG_BASE + 0x01F4U) +#define CPG_CPGWPCR (CPG_BASE + 0x0904U) /* RST Registers */ #define RST_BASE (0xE6160000U) #define RST_WDTRSTCR (RST_BASE + 0x0054U) +#define RST_MODEMR (RST_BASE + 0x0060U) #define WDTRSTCR_PASSWORD (0xA55A0000U) #define WDTRSTCR_RWDT_RSTMSK ((uint32_t)1U << 0U) /* MFIS Registers */ |