diff options
author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2018-12-28 20:23:36 +0100 |
---|---|---|
committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-01-08 14:08:44 +0100 |
commit | c6ae55cc7389ad4dff027c483fd290de7822470e (patch) | |
tree | 3ead6099dfb93538224cc1302104744e60ab1b4f /plat/renesas | |
parent | d48536e2f92d47ebb92cf12b35133c3be2d0e459 (diff) |
rcar_gen3: plat: Dump EL3 interrupt error registers
Since the interrupts are handled in EL3, dump the EL3 error registers
in case an error happens.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Diffstat (limited to 'plat/renesas')
-rw-r--r-- | plat/renesas/rcar/aarch64/plat_helpers.S | 2 | ||||
-rw-r--r-- | plat/renesas/rcar/bl2_interrupt_error.c | 48 |
2 files changed, 26 insertions, 24 deletions
diff --git a/plat/renesas/rcar/aarch64/plat_helpers.S b/plat/renesas/rcar/aarch64/plat_helpers.S index df1664d7..ae0d675d 100644 --- a/plat/renesas/rcar/aarch64/plat_helpers.S +++ b/plat/renesas/rcar/aarch64/plat_helpers.S @@ -217,6 +217,8 @@ endfunc platform_mem_init * --------------------------------------------- */ func plat_report_exception + /* Switch to SP_EL0 */ + msr spsel, #0 #if IMAGE_BL2 mov w1, #FIQ_SP_EL0 cmp w0, w1 diff --git a/plat/renesas/rcar/bl2_interrupt_error.c b/plat/renesas/rcar/bl2_interrupt_error.c index 2346017d..d9a4b8e6 100644 --- a/plat/renesas/rcar/bl2_interrupt_error.c +++ b/plat/renesas/rcar/bl2_interrupt_error.c @@ -24,7 +24,7 @@ void bl2_interrupt_error_id(uint32_t int_id) ERROR("\n"); if (int_id >= SWDT_ERROR_ID) { ERROR("Unhandled exception occurred.\n"); - ERROR(" Exception type = FIQ_SP_ELX\n"); + ERROR(" Exception type = FIQ_SP_EL0\n"); panic(); } @@ -32,11 +32,11 @@ void bl2_interrupt_error_id(uint32_t int_id) gicv2_end_of_interrupt((uint32_t) int_id); rcar_swdt_release(); ERROR("Unhandled exception occurred.\n"); - ERROR(" Exception type = FIQ_SP_ELX\n"); - ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1()); - ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1()); - ERROR(" ESR_EL1 = 0x%x\n", (uint32_t) read_esr_el1()); - ERROR(" FAR_EL1 = 0x%x\n", (uint32_t) read_far_el1()); + ERROR(" Exception type = FIQ_SP_EL0\n"); + ERROR(" SPSR_EL3 = 0x%x\n", (uint32_t) read_spsr_el3()); + ERROR(" ELR_EL3 = 0x%x\n", (uint32_t) read_elr_el3()); + ERROR(" ESR_EL3 = 0x%x\n", (uint32_t) read_esr_el3()); + ERROR(" FAR_EL3 = 0x%x\n", (uint32_t) read_far_el3()); ERROR("\n"); panic(); } @@ -78,27 +78,27 @@ void bl2_interrupt_error_type(uint32_t ex_type) &interrupt_ex[ex_type][0]); ERROR("%s", msg); switch (ex_type) { - case SYNC_EXCEPTION_SP_ELX: - ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1()); - ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1()); - ERROR(" ESR_EL1 = 0x%x\n", (uint32_t) read_esr_el1()); - ERROR(" FAR_EL1 = 0x%x\n", (uint32_t) read_far_el1()); + case SYNC_EXCEPTION_SP_EL0: + ERROR(" SPSR_EL3 = 0x%x\n", (uint32_t) read_spsr_el3()); + ERROR(" ELR_EL3 = 0x%x\n", (uint32_t) read_elr_el3()); + ERROR(" ESR_EL3 = 0x%x\n", (uint32_t) read_esr_el3()); + ERROR(" FAR_EL3 = 0x%x\n", (uint32_t) read_far_el3()); break; - case IRQ_SP_ELX: - ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1()); - ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1()); - ERROR(" IAR_EL1 = 0x%x\n", gicv2_acknowledge_interrupt()); + case IRQ_SP_EL0: + ERROR(" SPSR_EL3 = 0x%x\n", (uint32_t) read_spsr_el3()); + ERROR(" ELR_EL3 = 0x%x\n", (uint32_t) read_elr_el3()); + ERROR(" IAR_EL3 = 0x%x\n", gicv2_acknowledge_interrupt()); break; - case FIQ_SP_ELX: - ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1()); - ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1()); - ERROR(" IAR_EL1 = 0x%x\n", gicv2_acknowledge_interrupt()); + case FIQ_SP_EL0: + ERROR(" SPSR_EL3 = 0x%x\n", (uint32_t) read_spsr_el3()); + ERROR(" ELR_EL3 = 0x%x\n", (uint32_t) read_elr_el3()); + ERROR(" IAR_EL3 = 0x%x\n", gicv2_acknowledge_interrupt()); break; - case SERROR_SP_ELX: - ERROR(" SPSR_EL1 = 0x%x\n", (uint32_t) read_spsr_el1()); - ERROR(" ELR_EL1 = 0x%x\n", (uint32_t) read_elr_el1()); - ERROR(" ESR_EL1 = 0x%x\n", (uint32_t) read_esr_el1()); - ERROR(" FAR_EL1 = 0x%x\n", (uint32_t) read_far_el1()); + case SERROR_SP_EL0: + ERROR(" SPSR_EL3 = 0x%x\n", (uint32_t) read_spsr_el3()); + ERROR(" ELR_EL3 = 0x%x\n", (uint32_t) read_elr_el3()); + ERROR(" ESR_EL3 = 0x%x\n", (uint32_t) read_esr_el3()); + ERROR(" FAR_EL3 = 0x%x\n", (uint32_t) read_far_el3()); break; default: break; |