diff options
| author | Marek Vasut <marek.vasut+renesas@gmail.com> | 2018-12-30 17:21:39 +0100 |
|---|---|---|
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | 2019-01-08 14:06:29 +0100 |
| commit | 53ff5c79b4861b46496c4d4ee0bd7361eb3b4bf2 (patch) | |
| tree | db9b00faf48dbeb1322ea43dff8730518bcde1a4 /plat/renesas | |
| parent | 8a2f1eeedd96e2f3bed65a3c96ad6a53df2d3028 (diff) | |
rcar_gen3: plat: Fix cache line size
The CPU has cache line size of 64 Bytes, fix the cache line size.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Diffstat (limited to 'plat/renesas')
| -rw-r--r-- | plat/renesas/rcar/include/platform_def.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/renesas/rcar/include/platform_def.h b/plat/renesas/rcar/include/platform_def.h index 20fd7123..57399a24 100644 --- a/plat/renesas/rcar/include/platform_def.h +++ b/plat/renesas/rcar/include/platform_def.h @@ -79,7 +79,7 @@ * Cortex-A53 * L1:I/32KB(16KBx2way) D/32KB(8KBx4way) L2:512KB(32KBx16way) */ -#define PLATFORM_CACHE_LINE_SIZE 128 +#define PLATFORM_CACHE_LINE_SIZE 64 #define PLATFORM_CLUSTER_COUNT U(2) #define PLATFORM_CLUSTER0_CORE_COUNT U(4) #define PLATFORM_CLUSTER1_CORE_COUNT U(4) |