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authorMasahiro Yamada <yamada.masahiro@socionext.com>2016-12-28 16:11:41 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-01-18 19:33:41 +0900
commit474970535552b1e28b33461429b5492a1f1dd7cd (patch)
tree85c85f59bc891864b2b584213bffff755fdc01d8 /plat/qemu
parentecdc898da3f3c01a4034d875219c61357832c12c (diff)
Move BL_COHERENT_RAM_BASE/END defines to common_def.h
We have lots of duplicated defines (and comment blocks too). Move them to include/plat/common/common_def.h. While we are here, suffix the end address with _END instead of _LIMIT. The _END is a better fit to indicate the linker-derived real end address. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'plat/qemu')
-rw-r--r--plat/qemu/qemu_bl1_setup.c14
-rw-r--r--plat/qemu/qemu_bl2_setup.c12
-rw-r--r--plat/qemu/qemu_bl31_setup.c12
3 files changed, 3 insertions, 35 deletions
diff --git a/plat/qemu/qemu_bl1_setup.c b/plat/qemu/qemu_bl1_setup.c
index 4438aacc..21217d70 100644
--- a/plat/qemu/qemu_bl1_setup.c
+++ b/plat/qemu/qemu_bl1_setup.c
@@ -36,18 +36,6 @@
#include <platform_def.h>
#include "qemu_private.h"
-
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL1_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL1_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
-
/*******************************************************************************
* Declarations of linker defined symbols which will tell us where BL1 lives
* in Trusted RAM
@@ -98,7 +86,7 @@ void bl1_plat_arch_setup(void)
qemu_configure_mmu_el3(bl1_tzram_layout.total_base,
bl1_tzram_layout.total_size,
BL1_RO_BASE, BL1_RO_LIMIT,
- BL1_COHERENT_RAM_BASE, BL1_COHERENT_RAM_LIMIT);
+ BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END);
}
void bl1_platform_setup(void)
diff --git a/plat/qemu/qemu_bl2_setup.c b/plat/qemu/qemu_bl2_setup.c
index 24da2b6f..dba3beeb 100644
--- a/plat/qemu/qemu_bl2_setup.c
+++ b/plat/qemu/qemu_bl2_setup.c
@@ -46,16 +46,6 @@
#define BL2_RO_BASE (unsigned long)(&__RO_START__)
#define BL2_RO_LIMIT (unsigned long)(&__RO_END__)
-/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols refer to
- * page-aligned addresses.
- */
-#define BL2_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL2_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
/*******************************************************************************
* This structure represents the superset of information that is passed to
* BL3-1, e.g. while passing control to it from BL2, bl31_params
@@ -216,7 +206,7 @@ void bl2_plat_arch_setup(void)
qemu_configure_mmu_el1(bl2_tzram_layout.total_base,
bl2_tzram_layout.total_size,
BL2_RO_BASE, BL2_RO_LIMIT,
- BL2_COHERENT_RAM_BASE, BL2_COHERENT_RAM_LIMIT);
+ BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END);
}
/*******************************************************************************
diff --git a/plat/qemu/qemu_bl31_setup.c b/plat/qemu/qemu_bl31_setup.c
index 7a48358c..547e1355 100644
--- a/plat/qemu/qemu_bl31_setup.c
+++ b/plat/qemu/qemu_bl31_setup.c
@@ -47,16 +47,6 @@
#define BL31_END (unsigned long)(&__BL31_END__)
/*
- * The next 2 constants identify the extents of the coherent memory region.
- * These addresses are used by the MMU setup code and therefore they must be
- * page-aligned. It is the responsibility of the linker script to ensure that
- * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols
- * refer to page-aligned addresses.
- */
-#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__)
-#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__)
-
-/*
* Placeholder variables for copying the arguments that have been passed to
* BL3-1 from BL2.
*/
@@ -105,7 +95,7 @@ void bl31_plat_arch_setup(void)
{
qemu_configure_mmu_el3(BL31_RO_BASE, (BL31_END - BL31_RO_BASE),
BL31_RO_BASE, BL31_RO_LIMIT,
- BL31_COHERENT_RAM_BASE, BL31_COHERENT_RAM_LIMIT);
+ BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END);
}
static const unsigned int irq_sec_array[] = {