diff options
| author | kalyani chidambaram <kalyanic@nvidia.com> | 2018-04-09 14:40:02 -0700 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2019-01-31 08:50:13 -0800 |
| commit | da0f47437506b437a7729c22f95b9e351401d4af (patch) | |
| tree | a4a90b9f8d3941deffe10241c59f0cebb21f28f3 /plat/nvidia | |
| parent | e275ae7ae50d8cca292ef75dffab08ab296a273b (diff) | |
Tegra210: clear PMC_DPD registers on resume
This patch clears the PMC's DPD registers on resuming from System
Suspend, for all Tegra210 platforms that support the sc7entry-fw.
Change-Id: I7881ef0a5f609ed28b158bc2f4016abea3c7f305
Signed-off-by: kalyani chidambaram <kalyanic@nvidia.com>
Diffstat (limited to 'plat/nvidia')
| -rw-r--r-- | plat/nvidia/tegra/common/drivers/pmc/pmc.c | 14 | ||||
| -rw-r--r-- | plat/nvidia/tegra/include/drivers/pmc.h | 3 | ||||
| -rw-r--r-- | plat/nvidia/tegra/soc/t210/plat_psci_handlers.c | 6 |
3 files changed, 23 insertions, 0 deletions
diff --git a/plat/nvidia/tegra/common/drivers/pmc/pmc.c b/plat/nvidia/tegra/common/drivers/pmc/pmc.c index 30ebdc59..6c5a73ba 100644 --- a/plat/nvidia/tegra/common/drivers/pmc/pmc.c +++ b/plat/nvidia/tegra/common/drivers/pmc/pmc.c @@ -123,6 +123,20 @@ bool tegra_pmc_is_last_on_cpu(void) } /******************************************************************************* + * Handler to be called on exiting System suspend. Right now only DPD registers + * are cleared. + ******************************************************************************/ +void tegra_pmc_resume(void) +{ + + /* Clear DPD sample */ + mmio_write_32((TEGRA_PMC_BASE + PMC_IO_DPD_SAMPLE), 0x0); + + /* Clear DPD Enable */ + mmio_write_32((TEGRA_PMC_BASE + PMC_DPD_ENABLE_0), 0x0); +} + +/******************************************************************************* * Restart the system ******************************************************************************/ __dead2 void tegra_pmc_system_reset(void) diff --git a/plat/nvidia/tegra/include/drivers/pmc.h b/plat/nvidia/tegra/include/drivers/pmc.h index c376440f..32252a28 100644 --- a/plat/nvidia/tegra/include/drivers/pmc.h +++ b/plat/nvidia/tegra/include/drivers/pmc.h @@ -14,6 +14,7 @@ #include <tegra_def.h> #define PMC_CONFIG U(0x0) +#define PMC_IO_DPD_SAMPLE U(0x20) #define PMC_DPD_ENABLE_0 U(0x24) #define PMC_PWRGATE_STATUS U(0x38) #define PMC_PWRGATE_TOGGLE U(0x30) @@ -22,6 +23,7 @@ #define PMC_CRYPTO_OP_0 U(0xf4) #define PMC_TOGGLE_START U(0x100) #define PMC_SCRATCH39 U(0x138) +#define PMC_SCRATCH41 U(0x140) #define PMC_SECURE_SCRATCH6 U(0x224) #define PMC_SECURE_SCRATCH7 U(0x228) #define PMC_SECURE_DISABLE2 U(0x2c4) @@ -53,6 +55,7 @@ void tegra_pmc_cpu_on(int32_t cpu); void tegra_pmc_cpu_setup(uint64_t reset_addr); bool tegra_pmc_is_last_on_cpu(void); void tegra_pmc_lock_cpu_vectors(void); +void tegra_pmc_resume(void); __dead2 void tegra_pmc_system_reset(void); #endif /* PMC_H */ diff --git a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c index fde804d0..7907e460 100644 --- a/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c +++ b/plat/nvidia/tegra/soc/t210/plat_psci_handlers.c @@ -495,6 +495,12 @@ int tegra_soc_pwr_domain_on_finish(const psci_power_state_t *target_state) */ tegra_fc_lock_active_cluster(); + /* + * Resume PMC hardware block for Tegra210 platforms supporting sc7entry-fw + */ + if (!tegra_chipid_is_t210_b01() && (plat_params->sc7entry_fw_base != 0U)) + tegra_pmc_resume(); + return PSCI_E_SUCCESS; } |