diff options
| author | Steven Kao <skao@nvidia.com> | 2016-12-23 16:05:13 +0800 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2017-05-01 15:28:44 -0700 |
| commit | e99eeec6ff806208f50e4bdd86466694447b38eb (patch) | |
| tree | e6dda3f4984a1c269f661341428d6fae78873f49 /plat/nvidia | |
| parent | d29d96fb3fbb8900d45e9d3817b7df0366d2ea29 (diff) | |
Tegra: memmap Tegra micro-seconds timer controller
This patch adds the Tegra micro-seconds controller to the
memory map. This allows us to use the delay_timer functionality.
Change-Id: Ia8b148a871949bfede539974cacbe0e93ec7e77c
Signed-off-by: Steven Kao <skao@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia')
| -rw-r--r-- | plat/nvidia/tegra/common/tegra_bl31_setup.c | 6 | ||||
| -rw-r--r-- | plat/nvidia/tegra/include/t132/tegra_def.h | 3 | ||||
| -rw-r--r-- | plat/nvidia/tegra/include/t186/tegra_def.h | 1 | ||||
| -rw-r--r-- | plat/nvidia/tegra/include/t210/tegra_def.h | 3 | ||||
| -rw-r--r-- | plat/nvidia/tegra/soc/t210/platform_t210.mk | 2 |
5 files changed, 12 insertions, 3 deletions
diff --git a/plat/nvidia/tegra/common/tegra_bl31_setup.c b/plat/nvidia/tegra/common/tegra_bl31_setup.c index a61146d0..ffaa0ba3 100644 --- a/plat/nvidia/tegra/common/tegra_bl31_setup.c +++ b/plat/nvidia/tegra/common/tegra_bl31_setup.c @@ -354,6 +354,12 @@ void bl31_plat_arch_setup(void) MT_DEVICE | MT_RW | MT_SECURE); #endif + /* map on-chip free running uS timer */ + mmap_add_region(page_align((uint64_t)TEGRA_TMRUS_BASE, 0), + page_align((uint64_t)TEGRA_TMRUS_BASE, 0), + (uint64_t)TEGRA_TMRUS_SIZE, + MT_DEVICE | MT_RO | MT_SECURE); + /* add MMIO space */ plat_mmio_map = plat_get_mmio_map(); if (plat_mmio_map) diff --git a/plat/nvidia/tegra/include/t132/tegra_def.h b/plat/nvidia/tegra/include/t132/tegra_def.h index 4ba4f12c..e488bd87 100644 --- a/plat/nvidia/tegra/include/t132/tegra_def.h +++ b/plat/nvidia/tegra/include/t132/tegra_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -58,6 +58,7 @@ * Tegra micro-seconds timer constants ******************************************************************************/ #define TEGRA_TMRUS_BASE 0x60005010 +#define TEGRA_TMRUS_SIZE 0x1000 /******************************************************************************* * Tegra Clock and Reset Controller constants diff --git a/plat/nvidia/tegra/include/t186/tegra_def.h b/plat/nvidia/tegra/include/t186/tegra_def.h index ae11d281..6693cb3a 100644 --- a/plat/nvidia/tegra/include/t186/tegra_def.h +++ b/plat/nvidia/tegra/include/t186/tegra_def.h @@ -237,6 +237,7 @@ * Tegra micro-seconds timer constants ******************************************************************************/ #define TEGRA_TMRUS_BASE 0x0C2E0000 +#define TEGRA_TMRUS_SIZE 0x1000 /******************************************************************************* * Tegra Power Mgmt Controller constants diff --git a/plat/nvidia/tegra/include/t210/tegra_def.h b/plat/nvidia/tegra/include/t210/tegra_def.h index 09613551..d8ad10c8 100644 --- a/plat/nvidia/tegra/include/t210/tegra_def.h +++ b/plat/nvidia/tegra/include/t210/tegra_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -83,6 +83,7 @@ * Tegra micro-seconds timer constants ******************************************************************************/ #define TEGRA_TMRUS_BASE 0x60005010 +#define TEGRA_TMRUS_SIZE 0x1000 /******************************************************************************* * Tegra Clock and Reset Controller constants diff --git a/plat/nvidia/tegra/soc/t210/platform_t210.mk b/plat/nvidia/tegra/soc/t210/platform_t210.mk index 89468692..cd26e6e8 100644 --- a/plat/nvidia/tegra/soc/t210/platform_t210.mk +++ b/plat/nvidia/tegra/soc/t210/platform_t210.mk @@ -40,7 +40,7 @@ $(eval $(call add_define,PLATFORM_CLUSTER_COUNT)) PLATFORM_MAX_CPUS_PER_CLUSTER := 4 $(eval $(call add_define,PLATFORM_MAX_CPUS_PER_CLUSTER)) -MAX_XLAT_TABLES := 3 +MAX_XLAT_TABLES := 4 $(eval $(call add_define,MAX_XLAT_TABLES)) MAX_MMAP_REGIONS := 8 |