diff options
author | Steven Kao <skao@nvidia.com> | 2016-12-23 15:43:17 +0800 |
---|---|---|
committer | Varun Wadekar <vwadekar@nvidia.com> | 2017-04-07 09:23:24 -0700 |
commit | 83f3f536e559c2aa1605ca896a44ac0aa03fdd73 (patch) | |
tree | 2708bf7699f9170e7c733882fc780a840cf10496 /plat/nvidia | |
parent | 16c7cd01b255f0831bf475c41aa31dc91674870a (diff) |
Tegra186: PSCI: support for 64-bit TZDRAM base
This patch fixes the variable width to store the TZDRAM base
address used to resume from System Suspend.
Change-Id: Ib67eda64b09f26fb2f427f0d624f057081473132
Signed-off-by: Steven Kao <skao@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia')
-rw-r--r-- | plat/nvidia/tegra/soc/t186/plat_psci_handlers.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c index a170b994..66a5999a 100644 --- a/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c +++ b/plat/nvidia/tegra/soc/t186/plat_psci_handlers.c @@ -260,7 +260,7 @@ int tegra_soc_pwr_domain_power_down_wfi(const psci_power_state_t *target_state) plat_params_from_bl2_t *params_from_bl2 = bl31_get_plat_params(); unsigned int stateid_afflvl2 = pwr_domain_state[PLAT_MAX_PWR_LVL] & TEGRA186_STATE_ID_MASK; - uint32_t val; + uint64_t val; if (stateid_afflvl2 == PSTATE_ID_SOC_POWERDN) { /* |