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authorVarun Wadekar <vwadekar@nvidia.com>2016-07-20 10:28:51 -0700
committerVarun Wadekar <vwadekar@nvidia.com>2017-03-02 13:01:01 -0800
commite954ab8f7686cdf84859b940d7b54b5e64cf8ebc (patch)
treec202f7a62e1b9514476390f325a6ab240ff02c77 /plat/nvidia/tegra/include
parent6feeb0814d3ae8892c3f5e197fe6b95d05e8ca84 (diff)
Tegra: support for silicon/simulation platforms
This patch adds support to identify the underlying platform on which we are running. The currently supported platforms are actual silicon and simulation platforms. Change-Id: Iadf96e79ec663b3dbd1a18e9bb95ffcdb82fc8af Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/include')
-rw-r--r--plat/nvidia/tegra/include/t132/tegra_def.h6
-rw-r--r--plat/nvidia/tegra/include/t210/tegra_def.h6
-rw-r--r--plat/nvidia/tegra/include/tegra_platform.h50
3 files changed, 62 insertions, 0 deletions
diff --git a/plat/nvidia/tegra/include/t132/tegra_def.h b/plat/nvidia/tegra/include/t132/tegra_def.h
index 318f4def..314b7007 100644
--- a/plat/nvidia/tegra/include/t132/tegra_def.h
+++ b/plat/nvidia/tegra/include/t132/tegra_def.h
@@ -80,6 +80,12 @@
#define TEGRA_EVP_BASE 0x6000F000
/*******************************************************************************
+ * Tegra Miscellaneous register constants
+ ******************************************************************************/
+#define TEGRA_MISC_BASE 0x70000000
+#define HARDWARE_REVISION_OFFSET 0x804
+
+/*******************************************************************************
* Tegra UART controller base addresses
******************************************************************************/
#define TEGRA_UARTA_BASE 0x70006000
diff --git a/plat/nvidia/tegra/include/t210/tegra_def.h b/plat/nvidia/tegra/include/t210/tegra_def.h
index ce85427e..d24377da 100644
--- a/plat/nvidia/tegra/include/t210/tegra_def.h
+++ b/plat/nvidia/tegra/include/t210/tegra_def.h
@@ -105,6 +105,12 @@
#define TEGRA_EVP_BASE 0x6000F000
/*******************************************************************************
+ * Tegra Miscellaneous register constants
+ ******************************************************************************/
+#define TEGRA_MISC_BASE 0x70000000
+#define HARDWARE_REVISION_OFFSET 0x804
+
+/*******************************************************************************
* Tegra UART controller base addresses
******************************************************************************/
#define TEGRA_UARTA_BASE 0x70006000
diff --git a/plat/nvidia/tegra/include/tegra_platform.h b/plat/nvidia/tegra/include/tegra_platform.h
new file mode 100644
index 00000000..f9d7b60c
--- /dev/null
+++ b/plat/nvidia/tegra/include/tegra_platform.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * Redistributions of source code must retain the above copyright notice, this
+ * list of conditions and the following disclaimer.
+ *
+ * Redistributions in binary form must reproduce the above copyright notice,
+ * this list of conditions and the following disclaimer in the documentation
+ * and/or other materials provided with the distribution.
+ *
+ * Neither the name of ARM nor the names of its contributors may be used
+ * to endorse or promote products derived from this software without specific
+ * prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __TEGRA_PLATFORM_H__
+#define __TEGRA_PLATFORM_H__
+
+#include <sys/cdefs.h>
+
+/*
+ * Tegra chip identifiers
+ */
+uint8_t tegra_is_t132(void);
+uint8_t tegra_is_t210(void);
+
+/*
+ * Tegra platform identifiers
+ */
+uint8_t tegra_platform_is_silicon(void);
+uint8_t tegra_platform_is_qt(void);
+uint8_t tegra_platform_is_emulation(void);
+uint8_t tegra_platform_is_fpga(void);
+
+#endif /* __TEGRA_PLATFORM_H__ */