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authorVarun Wadekar <vwadekar@nvidia.com>2017-05-25 18:06:59 -0700
committerVarun Wadekar <vwadekar@nvidia.com>2017-06-14 17:01:39 -0700
commit9a8f05e47d00efa2f1eac07fe4373de464b5b11c (patch)
treefc78f4dd4e0e7c7ca8483d73c97bad6a8577dbe8 /plat/nvidia/tegra/include
parent5bd1a177dd8e93d05cb97d0b68c44f3d90f8dae6 (diff)
Tegra: gic: fix MISRA defects
Main fixes: * Use int32_t replace int, use uint32_t replace unsign int [Rule 4.6] * Added explicit casts (e.g. 0U) to integers in order for them to be compatible with whatever operation they're used in [Rule 10.1] * Force operands of an operator to the same type category [Rule 10.4] * Fixed assert/if statements conditions to be essentially boolean [Rule 14.4] * Added curly braces ({}) around if statements in order to make them compound [Rule 15.6] * Convert macros form headers to unsigned ints Change-Id: I8051cc16499cece2039c9751bd347645f40f0901 Signed-off-by: Anthony Zhou <anzhou@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/include')
-rw-r--r--plat/nvidia/tegra/include/tegra_private.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/plat/nvidia/tegra/include/tegra_private.h b/plat/nvidia/tegra/include/tegra_private.h
index ad68bc27..ec7a277c 100644
--- a/plat/nvidia/tegra/include/tegra_private.h
+++ b/plat/nvidia/tegra/include/tegra_private.h
@@ -71,8 +71,8 @@ int tegra_fiq_get_intr_context(void);
void tegra_fiq_set_ns_entrypoint(uint64_t entrypoint);
/* Declarations for tegra_gic.c */
-void tegra_gic_setup(const irq_sec_cfg_t *irq_sec_ptr, unsigned int num_irqs);
void tegra_gic_cpuif_deactivate(void);
+void tegra_gic_setup(const irq_sec_cfg_t *irq_sec_ptr, uint32_t num_irqs);
/* Declarations for tegra_security.c */
void tegra_security_setup(void);