diff options
| author | Varun Wadekar <vwadekar@nvidia.com> | 2016-08-23 14:01:19 -0700 |
|---|---|---|
| committer | Varun Wadekar <vwadekar@nvidia.com> | 2017-03-02 13:01:25 -0800 |
| commit | 23cd470f868b6b40b520c84f8d643502aff74975 (patch) | |
| tree | 60b0302639d991127b39f3ff5d0fd15c4b04c0e4 /plat/nvidia/tegra/include | |
| parent | 5b5928e834e5adfd4e4eb7d6b849cc6e8b4dbdf1 (diff) | |
Tegra: fix logic to calculate GICD_ISPENDR register address
This patch uses GICD_BASE to calculate the GICD_ISPENDR regsiter address
in the platform's 'plat_crash_print_regs' routine.
Reported by: Seth Eatinger <seatinger@nvidia.com>
Change-Id: Ic7be29abc781f475ad25b59582ae60a0a2497377
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Diffstat (limited to 'plat/nvidia/tegra/include')
| -rw-r--r-- | plat/nvidia/tegra/include/plat_macros.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/plat/nvidia/tegra/include/plat_macros.S b/plat/nvidia/tegra/include/plat_macros.S index 1afe4545..7db69308 100644 --- a/plat/nvidia/tegra/include/plat_macros.S +++ b/plat/nvidia/tegra/include/plat_macros.S @@ -52,7 +52,7 @@ spacer: */ .macro plat_crash_print_regs mov_imm x16, TEGRA_GICC_BASE - cbz x16, 1f + /* gicc base address is now in x16 */ adr x6, gicc_regs /* Load the gicc reg list to x6 */ /* Load the gicc regs to gp regs used by str_in_crash_buf_print */ @@ -63,6 +63,7 @@ spacer: bl str_in_crash_buf_print /* Print the GICD_ISPENDR regs */ + mov_imm x16, TEGRA_GICD_BASE add x7, x16, #GICD_ISPENDR adr x4, gicd_pend_reg bl asm_print_str |