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authorJeenu Viswambharan <jeenu.viswambharan@arm.com>2017-02-21 14:40:44 +0000
committerJeenu Viswambharan <jeenu.viswambharan@arm.com>2017-05-02 16:11:12 +0100
commitf4c8aa905414fb021c08370306bd516f678a58bd (patch)
tree7f727d80afb45c86cf12203e66d49bf23d5bd0b6 /plat/mediatek
parent7fa3214e18ad640208eaf6c8d6111ec53f3894aa (diff)
Add macro to check whether the CPU implements an EL
Replace all instances of checks with the new macro. Change-Id: I0eec39b9376475a1a9707a3115de9d36f88f8a2a Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
Diffstat (limited to 'plat/mediatek')
-rw-r--r--plat/mediatek/mt6795/bl31_plat_setup.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/plat/mediatek/mt6795/bl31_plat_setup.c b/plat/mediatek/mt6795/bl31_plat_setup.c
index af0858f0..1ba8b145 100644
--- a/plat/mediatek/mt6795/bl31_plat_setup.c
+++ b/plat/mediatek/mt6795/bl31_plat_setup.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -360,20 +360,15 @@ void enable_ns_access_to_cpuectlr(void)
static entry_point_info_t *bl31_plat_get_next_kernel64_ep_info(void)
{
entry_point_info_t *next_image_info;
- unsigned long el_status;
unsigned int mode;
- el_status = 0;
mode = 0;
/* Kernel image is always non-secured */
next_image_info = &bl33_image_ep_info;
/* Figure out what mode we enter the non-secure world in */
- el_status = read_id_aa64pfr0_el1() >> ID_AA64PFR0_EL2_SHIFT;
- el_status &= ID_AA64PFR0_ELX_MASK;
-
- if (el_status) {
+ if (EL_IMPLEMENTED(2)) {
INFO("Kernel_EL2\n");
mode = MODE_EL2;
} else{