diff options
author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2016-12-28 16:11:41 +0900 |
---|---|---|
committer | Masahiro Yamada <yamada.masahiro@socionext.com> | 2017-01-18 19:33:41 +0900 |
commit | 474970535552b1e28b33461429b5492a1f1dd7cd (patch) | |
tree | 85c85f59bc891864b2b584213bffff755fdc01d8 /plat/mediatek | |
parent | ecdc898da3f3c01a4034d875219c61357832c12c (diff) |
Move BL_COHERENT_RAM_BASE/END defines to common_def.h
We have lots of duplicated defines (and comment blocks too).
Move them to include/plat/common/common_def.h.
While we are here, suffix the end address with _END instead of
_LIMIT. The _END is a better fit to indicate the linker-derived
real end address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'plat/mediatek')
-rw-r--r-- | plat/mediatek/mt6795/bl31_plat_setup.c | 18 | ||||
-rw-r--r-- | plat/mediatek/mt8173/bl31_plat_setup.c | 20 |
2 files changed, 7 insertions, 31 deletions
diff --git a/plat/mediatek/mt6795/bl31_plat_setup.c b/plat/mediatek/mt6795/bl31_plat_setup.c index 3a8612d3..af0858f0 100644 --- a/plat/mediatek/mt6795/bl31_plat_setup.c +++ b/plat/mediatek/mt6795/bl31_plat_setup.c @@ -32,6 +32,7 @@ #include <arch_helpers.h> #include <bl_common.h> #include <cci.h> +#include <common_def.h> #include <console.h> #include <context_mgmt.h> #include <debug.h> @@ -52,9 +53,6 @@ unsigned long __RO_START__; unsigned long __RO_END__; -unsigned long __COHERENT_RAM_START__; -unsigned long __COHERENT_RAM_END__; - /* * The next 2 constants identify the extents of the code & RO data region. * These addresses are used by the MMU setup code and therefore they must be @@ -65,16 +63,6 @@ unsigned long __COHERENT_RAM_END__; #define BL31_RO_LIMIT (unsigned long)(&__RO_END__) /* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols - * refer to page-aligned addresses. - */ -#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) - -/* * Placeholder variables for copying the arguments that have been passed to * BL3-1 from BL2. */ @@ -323,8 +311,8 @@ void bl31_plat_arch_setup(void) (TZRAM_SIZE & ~(PAGE_SIZE_MASK)), (BL31_RO_BASE & ~(PAGE_SIZE_MASK)), BL31_RO_LIMIT, - BL31_COHERENT_RAM_BASE, - BL31_COHERENT_RAM_LIMIT); + BL_COHERENT_RAM_BASE, + BL_COHERENT_RAM_END); /* Initialize for ATF log buffer */ if (gteearg.atf_log_buf_size != 0) { gteearg.atf_aee_debug_buf_size = ATF_AEE_BUFFER_SIZE; diff --git a/plat/mediatek/mt8173/bl31_plat_setup.c b/plat/mediatek/mt8173/bl31_plat_setup.c index 4626f81f..ef18d079 100644 --- a/plat/mediatek/mt8173/bl31_plat_setup.c +++ b/plat/mediatek/mt8173/bl31_plat_setup.c @@ -30,6 +30,7 @@ #include <arm_gic.h> #include <assert.h> #include <bl_common.h> +#include <common_def.h> #include <console.h> #include <debug.h> #include <generic_delay_timer.h> @@ -47,9 +48,6 @@ unsigned long __RO_START__; unsigned long __RO_END__; -unsigned long __COHERENT_RAM_START__; -unsigned long __COHERENT_RAM_END__; - /* * The next 3 constants identify the extents of the code, RO data region and the * limit of the BL31 image. These addresses are used by the MMU setup code and @@ -61,16 +59,6 @@ unsigned long __COHERENT_RAM_END__; #define BL31_RO_LIMIT (unsigned long)(&__RO_END__) #define BL31_END (unsigned long)(&__BL31_END__) -/* - * The next 2 constants identify the extents of the coherent memory region. - * These addresses are used by the MMU setup code and therefore they must be - * page-aligned. It is the responsibility of the linker script to ensure that - * __COHERENT_RAM_START__ and __COHERENT_RAM_END__ linker symbols - * refer to page-aligned addresses. - */ -#define BL31_COHERENT_RAM_BASE (unsigned long)(&__COHERENT_RAM_START__) -#define BL31_COHERENT_RAM_LIMIT (unsigned long)(&__COHERENT_RAM_END__) - static entry_point_info_t bl32_ep_info; static entry_point_info_t bl33_ep_info; @@ -191,10 +179,10 @@ void bl31_plat_arch_setup(void) plat_cci_enable(); plat_configure_mmu_el3(BL31_RO_BASE, - (BL31_COHERENT_RAM_LIMIT - BL31_RO_BASE), + BL_COHERENT_RAM_END - BL31_RO_BASE, BL31_RO_BASE, BL31_RO_LIMIT, - BL31_COHERENT_RAM_BASE, - BL31_COHERENT_RAM_LIMIT); + BL_COHERENT_RAM_BASE, + BL_COHERENT_RAM_END); } |