diff options
| author | Jimmy Huang <jimmy.huang@mediatek.com> | 2015-09-04 10:30:57 +0800 |
|---|---|---|
| committer | Yidi Lin <yidi.lin@mediatek.com> | 2015-09-14 14:35:20 +0800 |
| commit | 2bab3d527375eee8eb060e8b1ab2c10141e88c06 (patch) | |
| tree | 3b7113c6079b1680993ec50b02654919be003412 /plat/mediatek | |
| parent | 0ad1a9b32939b3ecaffb2ee626326e39b8230d0e (diff) | |
mt8173: fix watchdog register setting
This patch corrects the watchdog register setting. To update watchdog
register, the watchdog mode key must be set to make the register
configurable.
Change-Id: I9ca98ea4012f7f220b116013461030de4638ce0b
Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>
Diffstat (limited to 'plat/mediatek')
| -rw-r--r-- | plat/mediatek/mt8173/plat_pm.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/plat/mediatek/mt8173/plat_pm.c b/plat/mediatek/mt8173/plat_pm.c index e663b94f..a84d0310 100644 --- a/plat/mediatek/mt8173/plat_pm.c +++ b/plat/mediatek/mt8173/plat_pm.c @@ -497,8 +497,9 @@ static void __dead2 plat_system_reset(void) /* Write the System Configuration Control Register */ INFO("MTK System Reset\n"); - mmio_clrbits_32(MTK_WDT_BASE, - (MTK_WDT_MODE_DUAL_MODE | MTK_WDT_MODE_IRQ)); + mmio_clrsetbits_32(MTK_WDT_BASE, + (MTK_WDT_MODE_DUAL_MODE | MTK_WDT_MODE_IRQ), + MTK_WDT_MODE_KEY); mmio_setbits_32(MTK_WDT_BASE, (MTK_WDT_MODE_KEY | MTK_WDT_MODE_EXTEN)); mmio_setbits_32(MTK_WDT_SWRST, MTK_WDT_SWRST_KEY); |