diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-07-09 14:02:43 -0700 |
|---|---|---|
| committer | Julius Werner <jwerner@chromium.org> | 2019-08-01 13:45:03 -0700 |
| commit | 402b3cf8766fe2cb4ae462f7ee7761d08a1ba56c (patch) | |
| tree | bf3de0c17a38822188847b7bdaad7f70441637b0 /plat/layerscape | |
| parent | d5dfdeb65ff5b7f24dded201d2945c7b74565ce8 (diff) | |
Switch AARCH32/AARCH64 to __aarch64__
NOTE: AARCH32/AARCH64 macros are now deprecated in favor of __aarch64__.
All common C compilers pre-define the same macros to signal which
architecture the code is being compiled for: __arm__ for AArch32 (or
earlier versions) and __aarch64__ for AArch64. There's no need for TF-A
to define its own custom macros for this. In order to unify code with
the export headers (which use __aarch64__ to avoid another dependency),
let's deprecate the AARCH32 and AARCH64 macros and switch the code base
over to the pre-defined standard macro. (Since it is somewhat
unintuitive that __arm__ only means AArch32, let's standardize on only
using __aarch64__.)
Change-Id: Ic77de4b052297d77f38fc95f95f65a8ee70cf200
Signed-off-by: Julius Werner <jwerner@chromium.org>
Diffstat (limited to 'plat/layerscape')
| -rw-r--r-- | plat/layerscape/common/ls_bl1_setup.c | 8 | ||||
| -rw-r--r-- | plat/layerscape/common/ls_bl2_setup.c | 8 | ||||
| -rw-r--r-- | plat/layerscape/common/ls_common.c | 4 |
3 files changed, 10 insertions, 10 deletions
diff --git a/plat/layerscape/common/ls_bl1_setup.c b/plat/layerscape/common/ls_bl1_setup.c index 163b35c4..fff065ef 100644 --- a/plat/layerscape/common/ls_bl1_setup.c +++ b/plat/layerscape/common/ls_bl1_setup.c @@ -59,11 +59,11 @@ void ls_bl1_plat_arch_setup(void) #endif ); VERBOSE("After setup the page tables\n"); -#ifdef AARCH32 - enable_mmu_svc_mon(0); -#else +#ifdef __aarch64__ enable_mmu_el3(0); -#endif /* AARCH32 */ +#else + enable_mmu_svc_mon(0); +#endif /* __aarch64__ */ VERBOSE("After MMU enabled\n"); } diff --git a/plat/layerscape/common/ls_bl2_setup.c b/plat/layerscape/common/ls_bl2_setup.c index 192eaec4..35f42e1f 100644 --- a/plat/layerscape/common/ls_bl2_setup.c +++ b/plat/layerscape/common/ls_bl2_setup.c @@ -54,10 +54,10 @@ void ls_bl2_plat_arch_setup(void) #endif ); -#ifdef AARCH32 - enable_mmu_svc_mon(0); -#else +#ifdef __aarch64__ enable_mmu_el1(0); +#else + enable_mmu_svc_mon(0); #endif } @@ -74,7 +74,7 @@ int ls_bl2_handle_post_image_load(unsigned int image_id) assert(bl_mem_params); switch (image_id) { -#ifdef AARCH64 +#ifdef __aarch64__ case BL32_IMAGE_ID: bl_mem_params->ep_info.spsr = ls_get_spsr_for_bl32_entry(); break; diff --git a/plat/layerscape/common/ls_common.c b/plat/layerscape/common/ls_common.c index 3b42909c..23c0d00a 100644 --- a/plat/layerscape/common/ls_common.c +++ b/plat/layerscape/common/ls_common.c @@ -143,7 +143,7 @@ uint32_t ls_get_spsr_for_bl32_entry(void) /******************************************************************************* * Gets SPSR for BL33 entry ******************************************************************************/ -#ifndef AARCH32 +#ifdef __aarch64__ uint32_t ls_get_spsr_for_bl33_entry(void) { unsigned int mode; @@ -181,7 +181,7 @@ uint32_t ls_get_spsr_for_bl33_entry(void) SPSR_E_LITTLE, DISABLE_ALL_EXCEPTIONS); return spsr; } -#endif /* AARCH32 */ +#endif /* __aarch64__ */ /******************************************************************************* * Returns Layerscape platform specific memory map regions. |