diff options
| author | Tien Hock, Loh <tien.hock.loh@intel.com> | 2019-07-09 13:17:04 +0800 |
|---|---|---|
| committer | Tien Hock, Loh <tien.hock.loh@intel.com> | 2019-07-10 11:39:03 +0800 |
| commit | 0943ea379f0380c0e95a606320768d63cb55b566 (patch) | |
| tree | 2adff93f2ab2aad3de66d494ee0871e99c10bd41 /plat/intel | |
| parent | 2cbeee4d519bac0d79da98faae969fae9f9558f9 (diff) | |
plat/intel: Fix SMPLSEL for MMC
MMC sample select needs to be set properly so that DWMMC clock can be
driven to 50Mhz
Signed-off-by: Tien Hock, Loh <tien.hock.loh@intel.com>
Change-Id: I4a1dde4f6a1e78a36940c57a7a5b162be0bd443a
Diffstat (limited to 'plat/intel')
| -rw-r--r-- | plat/intel/soc/stratix10/include/s10_system_manager.h | 5 | ||||
| -rw-r--r-- | plat/intel/soc/stratix10/soc/s10_system_manager.c | 3 |
2 files changed, 8 insertions, 0 deletions
diff --git a/plat/intel/soc/stratix10/include/s10_system_manager.h b/plat/intel/soc/stratix10/include/s10_system_manager.h index 802386c8..4500c6fb 100644 --- a/plat/intel/soc/stratix10/include/s10_system_manager.h +++ b/plat/intel/soc/stratix10/include/s10_system_manager.h @@ -59,6 +59,11 @@ #define S10_CCU_NOC_CPU0_RAMSPACE0_0 0xf7004688 #define S10_CCU_NOC_IOM_RAMSPACE0_0 0xf7018628 +#define S10_SYSMGR_CORE(x) (0xffd12000 + (x)) +#define SYSMGR_MMC 0x28 +#define SYSMGR_MMC_DRVSEL(x) (((x) & 0x7) << 0) + + #define DISABLE_L4_FIREWALL (BIT(0) | BIT(16) | BIT(24)) void enable_nonsecure_access(void); diff --git a/plat/intel/soc/stratix10/soc/s10_system_manager.c b/plat/intel/soc/stratix10/soc/s10_system_manager.c index 48f37d78..a2ed5a3e 100644 --- a/plat/intel/soc/stratix10/soc/s10_system_manager.c +++ b/plat/intel/soc/stratix10/soc/s10_system_manager.c @@ -86,5 +86,8 @@ void enable_nonsecure_access(void) mmio_clrbits_32(S10_CCU_NOC_CPU0_RAMSPACE0_0, 0x03); mmio_clrbits_32(S10_CCU_NOC_IOM_RAMSPACE0_0, 0x03); + + mmio_write_32(S10_SYSMGR_CORE(SYSMGR_MMC), SYSMGR_MMC_DRVSEL(3)); + } |