diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2018-06-14 13:25:33 +0800 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@nxp.com> | 2018-06-20 11:00:06 +0300 |
| commit | 06e550cd3103e4840ad49f23a2f4089a76b0a016 (patch) | |
| tree | e120f91c9cbdb0a64fffec5914cfdb65d29bafc9 /plat/imx/imx8qxp | |
| parent | 7b9b62cff3816e2196d1d9c94d8c95eedda96dec (diff) | |
imx8qxp: support MU power off during suspend
Add MU power off support for suspend, it needs
to be re-initialized after system resume.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'plat/imx/imx8qxp')
| -rw-r--r-- | plat/imx/imx8qxp/imx8qxp_psci.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/plat/imx/imx8qxp/imx8qxp_psci.c b/plat/imx/imx8qxp/imx8qxp_psci.c index baafc73d..d67a2599 100644 --- a/plat/imx/imx8qxp/imx8qxp_psci.c +++ b/plat/imx/imx8qxp/imx8qxp_psci.c @@ -13,6 +13,7 @@ #include <plat_imx8.h> #include <psci.h> #include <sci/sci.h> +#include "../../common/sci/mx8_mu.h" extern sc_ipc_t ipc_handle; extern void mdelay(uint32_t msec); @@ -198,6 +199,8 @@ void imx_domain_suspend_finish(const psci_power_state_t *target_state) u_register_t mpidr = read_mpidr_el1(); unsigned int cpu_id = MPIDR_AFFLVL0_VAL(mpidr); + MU_Resume(SC_IPC_CH); + sc_pm_req_low_power_mode(ipc_handle, ap_core_index[cpu_id], SC_PM_PW_MODE_ON); sc_pm_req_cpu_low_power_mode(ipc_handle, ap_core_index[cpu_id], SC_PM_PW_MODE_ON, SC_PM_WAKE_SRC_GIC); @@ -264,7 +267,7 @@ int plat_setup_psci_ops(uintptr_t sec_entrypoint, /* Request RUN and LP modes for DDR, system interconnect etc. */ sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A35, SC_PM_SYS_IF_DDR, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_STBY); - sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A35, SC_PM_SYS_IF_MU, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_STBY); + sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A35, SC_PM_SYS_IF_MU, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_OFF); sc_pm_req_sys_if_power_mode(ipc_handle, SC_R_A35, SC_PM_SYS_IF_INTERCONNECT, SC_PM_PW_MODE_ON, SC_PM_PW_MODE_STBY); return 0; |