summaryrefslogtreecommitdiff
path: root/plat/imx/imx8qxp/imx8qxp_bl31_setup.c
diff options
context:
space:
mode:
authorAnson Huang <Anson.Huang@nxp.com>2018-10-11 16:26:50 +0800
committerAnson Huang <Anson.Huang@nxp.com>2018-10-23 11:06:00 +0800
commit282f524de7f60a722910669a62bfd49eb4ec239c (patch)
treeb671f068ec295f2d73f69ba8d8911ea7e2658316 /plat/imx/imx8qxp/imx8qxp_bl31_setup.c
parent9aa39de9f366046a363a6754b40e9f277e73adbd (diff)
imx8qxp: add support for cpuidle
This patch adds support for cpuidle with CPU powerdown, there will be 3 idle states in Linux kernel: 1: wfi; 2: cpu power down; 3: cluster power down. As Linux kernel needs a broadcast timer for waking up CPU when whole CLUSTER is powerdown, GPT is adopted as broadcast timer, and to make the clock & power management easy for Linux kernel to avoid many workaround/hake in Linux kernel, TF-A will handle GPT's power & clock management as well as registers save/restore when suspend/resume. Also, psci power states are used to determine CORE/CLUSTER/SYSTEM power state to distinguish CPU idle and SYSTEM suspend which share same domain_suspend callback. The SoC IPs register mmap regions are merged into 1 large section to cover all the SoC IPs register ranges TF-A needs, this is to save mmap regions and make it simple. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'plat/imx/imx8qxp/imx8qxp_bl31_setup.c')
-rw-r--r--plat/imx/imx8qxp/imx8qxp_bl31_setup.c18
1 files changed, 7 insertions, 11 deletions
diff --git a/plat/imx/imx8qxp/imx8qxp_bl31_setup.c b/plat/imx/imx8qxp/imx8qxp_bl31_setup.c
index 470f6254..edc2ea46 100644
--- a/plat/imx/imx8qxp/imx8qxp_bl31_setup.c
+++ b/plat/imx/imx8qxp/imx8qxp_bl31_setup.c
@@ -372,6 +372,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
*/
sc_pm_set_resource_power_mode(ipc_handle, SC_R_MU_1A, SC_PM_PW_MODE_ON);
+ /* Turn on GPT_0's power & clock for non-secure OS/Hypervisor */
+ sc_pm_set_resource_power_mode(ipc_handle, SC_R_GPT_0, SC_PM_PW_MODE_ON);
+ sc_pm_clock_enable(ipc_handle, SC_R_GPT_0, SC_PM_CLK_PER, true, 0);
+ mmio_write_32(IMX_GPT0_LPCG_BASE, mmio_read_32(IMX_GPT0_LPCG_BASE) | (1 << 25));
+
/* create new partition for non-secure OS/Hypervisor
*
* uses global structs defined in sec_rsrc.h
@@ -407,18 +412,9 @@ void bl31_plat_arch_setup(void)
MT_MEMORY | MT_RW);
mmap_add_region(BL31_BASE, BL31_BASE, BL31_RO_LIMIT - BL31_RO_BASE,
MT_MEMORY | MT_RO);
- mmap_add_region(IMX_BOOT_UART_BASE, IMX_BOOT_UART_BASE,
- 0x1000, MT_DEVICE | MT_RW);
- mmap_add_region(SC_IPC_CH, SC_IPC_CH, 0x10000,
- MT_DEVICE | MT_RW);
- mmap_add_region(PLAT_GICD_BASE, PLAT_GICD_BASE, 0x10000,
- MT_DEVICE | MT_RW);
- mmap_add_region(PLAT_GICR_BASE, PLAT_GICR_BASE, 0xc0000,
- MT_DEVICE | MT_RW);
-// mmap_add_region(IMX_GPT0_BASE, IMX_GPT0_BASE, 0x10000,
-// MT_DEVICE | MT_RW);
- mmap_add_region(IMX_WUP_IRQSTR, IMX_WUP_IRQSTR, 0x10000,
+ mmap_add_region(IMX_REG_BASE, IMX_REG_BASE, IMX_REG_SIZE,
MT_DEVICE | MT_RW);
+
#ifdef SPD_trusty
mmap_add_region(BL32_BASE, BL32_BASE, BL32_SIZE, MT_MEMORY | MT_RW);
#endif