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author | Bai Ping <ping.bai@nxp.com> | 2018-01-24 14:14:21 +0800 |
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committer | Abel Vesa <abel.vesa@nxp.com> | 2018-06-11 10:33:02 +0300 |
commit | 5b1d3771ebb1e4489e3b413dbdac82249d8d60b1 (patch) | |
tree | e202c00073746b35f6d49a0d415c1fc7d0afa647 /plat/imx/imx8qm/platform.mk | |
parent | 5c97d1df7ce9756d4a30b0c5b85dc1d77ae44a2a (diff) |
plat: imx8mq: Improve the DDR DVFS flow on imx8mq
Flush the L1 and L2 cache before DDR frequency change to
make sure that no DDR memory access caused by cache activity.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'plat/imx/imx8qm/platform.mk')
0 files changed, 0 insertions, 0 deletions