diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2018-01-19 10:41:29 +0800 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@nxp.com> | 2018-06-11 10:33:02 +0300 |
| commit | 04da98c87148ad468bd19c38b450b063398ec0f1 (patch) | |
| tree | 53155242baabb2551736c72405da13f2f4eab253 /plat/imx/imx8qm/imx8qm_psci.c | |
| parent | 06a8c7dbdff87894dd11458225b3b43f19a2c62b (diff) | |
imx8qm: correct cluster/cpu power down sequence
cluster needs to be power down only after cpus inside
it are all powered down, so move all of them into kill
function;
Enable USE_COHERENT_MEM feature to make sure no cache
coherence issue and avoid cache operations in many places;
Add return value for cpu kill function.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@nxp.com>
Diffstat (limited to 'plat/imx/imx8qm/imx8qm_psci.c')
| -rw-r--r-- | plat/imx/imx8qm/imx8qm_psci.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/plat/imx/imx8qm/imx8qm_psci.c b/plat/imx/imx8qm/imx8qm_psci.c index 78cd5803..d96a6cde 100644 --- a/plat/imx/imx8qm/imx8qm_psci.c +++ b/plat/imx/imx8qm/imx8qm_psci.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. - * Copyright 2017 NXP + * Copyright 2018 NXP * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions are met: @@ -55,8 +55,11 @@ const static int ap_core_index[PLATFORM_CORE_COUNT] = { SC_R_A53_3, SC_R_A72_0, SC_R_A72_1, }; -static unsigned int a53_cpu_on_number; -static unsigned int a72_cpu_on_number; +/* need to enable USE_COHERENT_MEM to avoid coherence issue */ +#if USE_COHERENT_MEM +static unsigned int a53_cpu_on_number __section("tzfw_coherent_mem"); +static unsigned int a72_cpu_on_number __section("tzfw_coherent_mem"); +#endif int imx_pwr_domain_on(u_register_t mpidr) { @@ -144,6 +147,12 @@ void imx_pwr_domain_off(const psci_power_state_t *target_state) tf_printf("turn off cluster:%d core:%d\n", cluster_id, cpu_id); } +void __dead2 imx_pwr_domain_pwr_down_wfi(const psci_power_state_t *target_state) +{ + while (1) + wfi(); +} + int imx_validate_ns_entrypoint(uintptr_t ns_entrypoint) { /* TODO */ @@ -258,6 +267,7 @@ static const plat_psci_ops_t imx_plat_psci_ops = { .cpu_standby = imx_cpu_standby, .pwr_domain_suspend = imx_domain_suspend, .pwr_domain_suspend_finish = imx_domain_suspend_finish, + .pwr_domain_pwr_down_wfi = imx_pwr_domain_pwr_down_wfi, .get_sys_suspend_power_state = imx_get_sys_suspend_power_state, .system_reset = imx_system_reset, .system_off = imx_system_off, |