diff options
| author | Aymen Sghaier <aymen.sghaier@nxp.com> | 2017-12-08 15:03:19 +0100 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@nxp.com> | 2018-06-11 10:33:02 +0300 |
| commit | 6c485ce1f3e62723b1ac2a2b8385126ce8a4fe1d (patch) | |
| tree | a33a8939c9e2a8cc52d6aa514eb0ab0629bbb3e6 /plat/imx/imx8mq | |
| parent | c82c579be15ca6221353a22b30a23944dc92985a (diff) | |
MLK-17111: crypto: caam: Configure job rings master ID
For i.MX8MQ B0 revision the default configuration of JRaMID is not
valid to allow Kernel use CAAM job ring. This patch set the Master ID
of Cortex A in the JRaMID registers.
Signed-off-by: Aymen Sghaier <aymen.sghaier@nxp.com>
Diffstat (limited to 'plat/imx/imx8mq')
| -rw-r--r-- | plat/imx/imx8mq/imx8m_bl31_setup.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/plat/imx/imx8mq/imx8m_bl31_setup.c b/plat/imx/imx8mq/imx8m_bl31_setup.c index 65321e78..d1bf2ffc 100644 --- a/plat/imx/imx8mq/imx8m_bl31_setup.c +++ b/plat/imx/imx8mq/imx8m_bl31_setup.c @@ -57,6 +57,11 @@ #define BL31_RO_LIMIT (unsigned long)(&__RO_END__) #define BL31_END (unsigned long)(&__BL31_END__) +#define CAAM_JR0MID (0x30900010) +#define CAAM_JR1MID (0x30900018) +#define CAAM_JR2MID (0x30900020) +#define CAAM_NS_MID (0x1) + static entry_point_info_t bl32_image_ep_info; static entry_point_info_t bl33_image_ep_info; @@ -135,6 +140,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, mmio_write_32(0x303e0000 + i * 4, 0xffffffff); } + /* config CAAM JRaMID set MID to Cortex A */ + mmio_write_32(CAAM_JR0MID, CAAM_NS_MID); + mmio_write_32(CAAM_JR1MID, CAAM_NS_MID); + mmio_write_32(CAAM_JR2MID, CAAM_NS_MID); + /* config the AIPSTZ1 */ mmio_write_32(0x301f0000, 0x77777777); mmio_write_32(0x301f0004, 0x77777777); |