diff options
author | Jacky Bai <ping.bai@nxp.com> | 2020-01-07 14:39:15 +0800 |
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committer | Jacky Bai <ping.bai@nxp.com> | 2020-02-09 20:58:49 +0800 |
commit | 6f36b7598926f49a061faab1e6d7c729e2ce4926 (patch) | |
tree | 335f9d0ea66f1bd0fc17793f938ed9418c2022dc /plat/imx/imx8m/include | |
parent | 4bd311ed653851ba3bb1cdad04dd40b98c241491 (diff) |
plat: imx8m: Add a simple csu driver for imx8m family
Add a simple CSU driver for i.MX8M family.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Diffstat (limited to 'plat/imx/imx8m/include')
-rw-r--r-- | plat/imx/imx8m/include/imx8m_csu.h | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/plat/imx/imx8m/include/imx8m_csu.h b/plat/imx/imx8m/include/imx8m_csu.h new file mode 100644 index 00000000..1db5648f --- /dev/null +++ b/plat/imx/imx8m/include/imx8m_csu.h @@ -0,0 +1,74 @@ +/* + * Copyright 2020 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef IMX_CSU_H +#define IMX_CSU_H + +#include <lib/utils_def.h> + +#include <platform_def.h> + +#define CSU_SEC_LEVEL_0 0xff +#define CSU_SEC_LEVEL_1 0xbb +#define CSU_SEC_LEVEL_2 0x3f +#define CSU_SEC_LEVEL_3 0x3b +#define CSU_SEC_LEVEL_4 0x33 +#define CSU_SEC_LEVEL_5 0x22 +#define CSU_SEC_LEVEL_6 0x03 +#define CSU_SEC_LEVEL_7 0x0 + +#define LOCKED 0x1 +#define UNLOCKED 0x0 + +#define CSLx_REG(x) (IMX_CSU_BASE + ((x) / 2) * 4) +#define CSLx_LOCK(x) ((0x1 << (((x) % 2) * 16 + 8))) +#define CSLx_CFG(x, n) ((x) << (((n) % 2) * 16)) + +#define CSU_HP_REG(x) (IMX_CSU_BASE + ((x) / 16) * 4 + 0x200) +#define CSU_HP_LOCK(x) ((0x1 << (((x) % 16) * 2 + 1))) +#define CSU_HP_CFG(x, n) ((x) << (((n) % 16) * 2)) + +#define CSU_SA_REG(x) (IMX_CSU_BASE + 0x218) +#define CSU_SA_LOCK(x) ((0x1 << (((x) % 16) * 2 + 1))) +#define CSU_SA_CFG(x, n) ((x) << (((n) % 16) * 2)) + +#define CSU_HPCONTROL_REG(x) (IMX_CSU_BASE + (((x) / 16) * 4) + 0x358) +#define CSU_HPCONTROL_LOCK(x) ((0x1 << (((x) % 16) * 2 + 1))) +#define CSU_HPCONTROL_CFG(x, n) ((x) << (((n) % 16) * 2)) + +enum csu_cfg_type { + CSU_INVALID, + CSU_CSL, + CSU_HP, + CSU_SA, + CSU_HPCONTROL, +}; + +struct imx_csu_cfg { + enum csu_cfg_type type; + uint16_t idx; + uint16_t lock : 1; + uint16_t csl_level : 8; + uint16_t hp : 1; + uint16_t sa : 1; + uint16_t hpctrl : 1; +}; + +#define CSU_CSLx(i, level, lk) \ + {CSU_CSL, .idx = (i), .csl_level = (level), .lock = (lk),} + +#define CSU_HPx(i, val, lk) \ + {CSU_HP, .idx = (i), .hp = (val), .lock =(lk), } + +#define CSU_SA(i, val, lk) \ + {CSU_SA, .idx(i), .sa = (val), .lock = (lk), } + +#define CSU_HPCTRL(i, val, lk) \ + {CSU_HPCONTROL, .idx(i), .hpctrl = (val), .lock = (lk), } + +void imx_csu_init(const struct imx_csu_cfg *csu_cfg); + +#endif /* IMX_CSU_H */ |