diff options
author | Jacky Bai <ping.bai@nxp.com> | 2019-07-18 13:43:17 +0800 |
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committer | Jacky Bai <ping.bai@nxp.com> | 2019-07-24 09:03:03 +0800 |
commit | 3d660799b4433692a1f04fbdd198f3b1a59c7952 (patch) | |
tree | 2f213b17e927c13996642303d6316751cac2b38c /plat/imx/imx8m/include | |
parent | b514ee86c4354a8fae21f853bc8d9c6728543267 (diff) |
plat: imx8m: Add basic rdc module init driver
Add the basic support for RDC init/config driver,
this module driver can be enhanced more if necessary.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Change-Id: I290dc378d0d85671435f9de46d5aa790b4e006c8
Diffstat (limited to 'plat/imx/imx8m/include')
-rw-r--r-- | plat/imx/imx8m/include/imx_rdc.h | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/plat/imx/imx8m/include/imx_rdc.h b/plat/imx/imx8m/include/imx_rdc.h new file mode 100644 index 00000000..6be8550d --- /dev/null +++ b/plat/imx/imx8m/include/imx_rdc.h @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2019, NXP. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef IMX_RDC_H +#define IMX_RDC_H + +#include <lib/utils_def.h> + +#include <platform_def.h> + +#define MDAn(x) (IMX_RDC_BASE + 0x200 + (x) * 4) +#define PDAPn(x) (IMX_RDC_BASE + 0x400 + (x) * 4) +#define MRSAn(x) (IMX_RDC_BASE + 0x800 + (x) * 4) +#define MREAn(x) (IMX_RDC_BASE + 0x804 + (x) * 4) +#define MRCn(x) (IMX_RDC_BASE + 0x808 + (x) * 4) + +#define LCK BIT(31) +#define SREQ BIT(30) +#define ENA BIT(30) + +#define DID0 U(0x0) +#define DID1 U(0x1) +#define DID2 U(0x2) +#define DID3 U(0x3) + +#define D3R BIT(7) +#define D3W BIT(6) +#define D2R BIT(5) +#define D2W BIT(4) +#define D1R BIT(3) +#define D1W BIT(2) +#define D0R BIT(1) +#define D0W BIT(0) + +union rdc_setting { + uint32_t rdc_mda; /* Master Domain Assignment */ + uint32_t rdc_pdap; /* Peripheral Domain Access Permissions */ + uint32_t rdc_mem_region[3]; /* Memory Region Access Control */ +}; + +enum rdc_type { + RDC_INVALID, + RDC_MDA, + RDC_PDAP, + RDC_MEM_REGION, +}; + +struct imx_rdc_cfg { + enum rdc_type type; /* config type Master, Peripheral or Memory region */ + int index; + union rdc_setting setting; +}; + +#define RDC_MDAn(i, mda) \ + {RDC_MDA, (i), .setting.rdc_mda = (mda), } +#define RDC_PDAPn(i, pdap) \ + {RDC_PDAP, (i), .setting.rdc_pdap = (pdap), } + +#define RDC_MEM_REGIONn(i, msa, mea, mrc) \ + { RDC_MEM_REGION, (i), \ + .setting.rdc_mem_region[0] = (msa), \ + .setting.rdc_mem_region[1] = (mea), \ + .setting.rdc_mem_region[2] = (mrc), \ + } + +void imx_rdc_init(const struct imx_rdc_cfg *cfg); + +#endif /* IMX_RDC_H */ + |