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authorJacky Bai <ping.bai@nxp.com>2019-12-11 16:26:59 +0800
committerJacky Bai <ping.bai@nxp.com>2020-01-03 13:14:03 +0800
commit1536c58dd15bf0a75a93075fae67ed5480404851 (patch)
tree20aa59be198338ae77d22afc644f344358a3a833 /plat/imx/imx8m/include
parentcbab087cbffa801869ec9c448a1b0cd0bef47091 (diff)
plat: imx8m: Add the PU power domain support on imx8mm/mn
Add the PU power domain support for imx8mm/mn. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Diffstat (limited to 'plat/imx/imx8m/include')
-rw-r--r--plat/imx/imx8m/include/gpc.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/plat/imx/imx8m/include/gpc.h b/plat/imx/imx8m/include/gpc.h
index f27ab6a3..d7e72228 100644
--- a/plat/imx/imx8m/include/gpc.h
+++ b/plat/imx/imx8m/include/gpc.h
@@ -90,6 +90,33 @@
#define IRQ_IMR_NUM 4
#define IMR_MASK_ALL 0xffffffff
+#define IMX_PD_DOMAIN(name) \
+ { \
+ .pwr_req = name##_PWR_REQ, \
+ .pgc_offset = name##_PGC, \
+ .need_sync = false, \
+ .init_on = true, \
+ }
+
+#define IMX_MIX_DOMAIN(name) \
+ { \
+ .pwr_req = name##_PWR_REQ, \
+ .pgc_offset = name##_PGC, \
+ .adb400_sync = name##_ADB400_SYNC, \
+ .adb400_ack = name##_ADB400_ACK, \
+ .need_sync = true, \
+ .init_on = true, \
+ }
+
+struct imx_pwr_domain {
+ uint32_t pwr_req;
+ uint32_t adb400_sync;
+ uint32_t adb400_ack;
+ uint32_t pgc_offset;
+ bool need_sync;
+ bool init_on;
+};
+
/* function declare */
void imx_gpc_init(void);
void imx_set_cpu_secure_entry(unsigned int core_index, uintptr_t sec_entrypoint);
@@ -104,5 +131,6 @@ void imx_set_sys_lpm(unsigned last_core, bool retention);
void imx_set_rbc_count(void);
void imx_clear_rbc_count(void);
void imx_anamix_override(bool enter);
+void imx_gpc_pm_domain_enable(uint32_t domain_id, bool on);
#endif /*IMX8M_GPC_H */