diff options
| author | Leonard Crestez <leonard.crestez@nxp.com> | 2019-05-10 13:07:41 +0300 |
|---|---|---|
| committer | Leonard Crestez <leonard.crestez@nxp.com> | 2019-05-20 11:24:54 +0300 |
| commit | 72196cbb669bf3fe9b28091889e8fc7fbf2a2556 (patch) | |
| tree | e6f3105e9618281f3e5be1ebda19c0a987a0bc1e /plat/imx/imx8m/imx8mq/include | |
| parent | d8b11091b6f9032c16fdc54218ceda10d21e3355 (diff) | |
plat: imx8mq: Implement IMX_SIP_GET_SOC_INFO
The manual documents that 0x3036006c should contains the soc revision
for imx8mq but this always reports A0. Work around this by parsing the
ROM header and checking if OCOTP register 0x40 is stuck at 0xff0055aa.
Determining this inside TF-A makes life easier for OS, see for example
this linux discussion: https://lkml.org/lkml/2019/5/3/465
The soc revision can also be useful inside TF-A itself, for example for
the non-upstream DDR DVFS "busfreq" feature is affected by 8mq erratas.
The clock for OCOTP block can be disabled by OS so only initialize soc
revision once at boot time.
Change-Id: I9ca3f27840229ce8a28b53870e44da29f63c73aa
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Diffstat (limited to 'plat/imx/imx8m/imx8mq/include')
| -rw-r--r-- | plat/imx/imx8m/imx8mq/include/platform_def.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/plat/imx/imx8m/imx8mq/include/platform_def.h b/plat/imx/imx8m/imx8mq/include/platform_def.h index b54201ed..0e678ca8 100644 --- a/plat/imx/imx8m/imx8mq/include/platform_def.h +++ b/plat/imx/imx8m/imx8mq/include/platform_def.h @@ -59,6 +59,7 @@ #define IMX_AIPS_SIZE U(0xC00000) #define IMX_AIPS1_BASE U(0x30200000) #define IMX_AIPS3_ARB_BASE U(0x30800000) +#define IMX_OCOTP_BASE U(0x30350000) #define IMX_ANAMIX_BASE U(0x30360000) #define IMX_CCM_BASE U(0x30380000) #define IMX_SRC_BASE U(0x30390000) @@ -73,7 +74,9 @@ #define IMX_DDRC_BASE U(0x3d400000) #define IMX_DDRPHY_BASE U(0x3c000000) #define IMX_DDR_IPS_BASE U(0x3d000000) + #define IMX_ROM_BASE U(0x00000000) +#define IMX_ROM_SIZE U(0x20000) #define AIPSTZ1_BASE U(0x301f0000) #define AIPSTZ2_BASE U(0x305f0000) |