diff options
author | Ji Luo <ji.luo@nxp.com> | 2020-02-21 11:19:49 +0800 |
---|---|---|
committer | Ji Luo <ji.luo@nxp.com> | 2020-03-09 10:11:45 +0800 |
commit | 9e373ebed30b7b1ff558a8cf62489071192448c9 (patch) | |
tree | b10fa8dcefc45a7e2a4c29c83cc1b64d5404b97a /plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c | |
parent | 87051cf96125845ec67be5981c149b1401fd4b60 (diff) |
MA-14173 Enable trusty for imx8mq
Add trusty support for imx8mq, default load address
and size for trusty os will be 0xfe000000 and 0x2000000.
Signed-off-by: Ji Luo <ji.luo@nxp.com>
(cherry picked from a708794ccde53d8253a74ff578ca9d5258971690)
Diffstat (limited to 'plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c')
-rw-r--r-- | plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c index fcfe0dfc..661bb5c4 100644 --- a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c +++ b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c @@ -28,6 +28,8 @@ #include <imx8m_caam.h> #include <plat_imx8.h> +#define TRUSTY_PARAMS_LEN_BYTES (4096*2) + static const mmap_region_t imx_mmap[] = { MAP_REGION_FLAT(GPV_BASE, GPV_SIZE, MT_DEVICE | MT_RW), /* GPV map */ MAP_REGION_FLAT(IMX_ROM_BASE, IMX_ROM_SIZE, MT_MEMORY | MT_RO), /* ROM map */ @@ -152,13 +154,18 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, bl33_image_ep_info.spsr = get_spsr_for_bl33_entry(); SET_SECURITY_STATE(bl33_image_ep_info.h.attr, NON_SECURE); -#ifdef SPD_opteed +#if defined(SPD_opteed) || defined(SPD_trusty) /* Populate entry point information for BL32 */ SET_PARAM_HEAD(&bl32_image_ep_info, PARAM_EP, VERSION_1, 0); SET_SECURITY_STATE(bl32_image_ep_info.h.attr, SECURE); bl32_image_ep_info.pc = BL32_BASE; bl32_image_ep_info.spsr = 0; +#ifdef SPD_trusty + bl32_image_ep_info.args.arg0 = BL32_SIZE; + bl32_image_ep_info.args.arg1 = BL32_BASE; +#endif + /* Pass TEE base and size to bl33 */ bl33_image_ep_info.args.arg1 = BL32_BASE; bl33_image_ep_info.args.arg2 = BL32_SIZE; @@ -174,6 +181,9 @@ void bl31_plat_arch_setup(void) mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, (BL_CODE_END - BL_CODE_BASE), MT_MEMORY | MT_RO | MT_SECURE); + // Map TEE memory + mmap_add_region(BL32_BASE, BL32_BASE, BL32_SIZE, MT_MEMORY | MT_RW); + mmap_add(imx_mmap); #if USE_COHERENT_MEM @@ -223,3 +233,11 @@ void bl31_plat_runtime_setup(void) { return; } + +#ifdef SPD_trusty +void plat_trusty_set_boot_args(aapcs64_params_t *args) { + args->arg0 = BL32_SIZE; + args->arg1 = BL32_BASE; + args->arg2 = TRUSTY_PARAMS_LEN_BYTES; +} +#endif |