diff options
| author | Soby Mathew <soby.mathew@arm.com> | 2019-05-28 13:18:56 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2019-05-28 13:18:56 +0000 |
| commit | 4d384eb4ed119723f530ddb3e1fb55239aae4178 (patch) | |
| tree | de4b98f8dda880ba3f9c5e44afdedce208e3727a /plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c | |
| parent | 68b8ab0bbcfbce893731b3db85cebe7cad73e37a (diff) | |
| parent | ac166f64e2397f2c12f261e2baf6f63ae89de385 (diff) | |
Merge "plat: imx8m: Add the aipstz init to config peripheral access" into integration
Diffstat (limited to 'plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c')
| -rw-r--r-- | plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c index ea60466f..ce55d7f3 100644 --- a/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c +++ b/plat/imx/imx8m/imx8mq/imx8mq_bl31_setup.c @@ -22,6 +22,7 @@ #include <plat/common/platform.h> #include <gpc.h> +#include <imx_aipstz.h> #include <imx_uart.h> #include <plat_imx8.h> @@ -33,6 +34,14 @@ static const mmap_region_t imx_mmap[] = { {0}, }; +static const struct aipstz_cfg aipstz[] = { + {AIPSTZ1_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {AIPSTZ2_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {AIPSTZ3_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {AIPSTZ4_BASE, 0x77777777, 0x77777777, .opacr = {0x0, 0x0, 0x0, 0x0, 0x0}, }, + {0}, +}; + static entry_point_info_t bl32_image_ep_info; static entry_point_info_t bl33_image_ep_info; @@ -118,6 +127,8 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, mmio_write_32(IMX_CSU_BASE + i * 4, 0xffffffff); } + imx_aipstz_init(aipstz); + /* config CAAM JRaMID set MID to Cortex A */ mmio_write_32(CAAM_JR0MID, CAAM_NS_MID); mmio_write_32(CAAM_JR1MID, CAAM_NS_MID); |