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authorJacky Bai <ping.bai@nxp.com>2020-10-27 16:20:41 +0800
committerJacky Bai <ping.bai@nxp.com>2020-10-28 09:38:55 +0800
commitccf1c54f080009827f2b8dd34ed5eb8564bab8b6 (patch)
tree1a34ac214f44adc395f3810df9bd7aa9856d7ec2 /plat/imx/imx8m/imx8mp/include/gpc_reg.h
parenta9ecd1f1ff6d213e4f13a35aa07a69445b6a1b55 (diff)
MLK-24923-01: Define the IRQ_IMR_NUM for each soc of imx8m separately
As the the number of IRQ IMR register on some i.MX8M SoC is different, define this macro in each SoC's dedicated header file. Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'plat/imx/imx8m/imx8mp/include/gpc_reg.h')
-rw-r--r--plat/imx/imx8m/imx8mp/include/gpc_reg.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/plat/imx/imx8m/imx8mp/include/gpc_reg.h b/plat/imx/imx8m/imx8mp/include/gpc_reg.h
index 66e4b920..4b44c165 100644
--- a/plat/imx/imx8m/imx8mp/include/gpc_reg.h
+++ b/plat/imx/imx8m/imx8mp/include/gpc_reg.h
@@ -142,4 +142,6 @@
#define MEDIAMIX_ISPDWP_PGC 0xf80
#define DDRMIX_PGC 0xfc0
+#define IRQ_IMR_NUM 5U
+
#endif /* GPC_REG_H */