diff options
author | Jacky Bai <ping.bai@nxp.com> | 2020-06-30 17:35:30 +0800 |
---|---|---|
committer | Jacky Bai <ping.bai@nxp.com> | 2020-07-01 16:12:48 +0800 |
commit | aa3fee73c322ccc664f9b7715412d929e55c914f (patch) | |
tree | 0c55598504b5f430eb1a4ff05a5d102823afbf6a /plat/imx/imx8m/imx8mp/gpc.c | |
parent | 2eb979f144f1c008f64d4550035ece0ad69a2365 (diff) |
MLK-24360 plat: imx8mp: fix the vpu noc nttp handshake hang issue
The VC8000E's clock should be gated before power up it to make
sure the noc port can be synced successfully during vc8000e
reset.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'plat/imx/imx8m/imx8mp/gpc.c')
-rw-r--r-- | plat/imx/imx8m/imx8mp/gpc.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/plat/imx/imx8m/imx8mp/gpc.c b/plat/imx/imx8m/imx8mp/gpc.c index 89631a24..a414465b 100644 --- a/plat/imx/imx8m/imx8mp/gpc.c +++ b/plat/imx/imx8m/imx8mp/gpc.c @@ -362,6 +362,9 @@ void imx_gpc_pm_domain_enable(uint32_t domain_id, bool on) mmio_write_32(0x32fc0050, 0x7ffff87e); } + if (domain_id == VPU_H1) + mmio_clrbits_32(IMX_VPU_BLK_BASE + 0x4, BIT(2)); + /* clear the PGC bit */ mmio_clrbits_32(IMX_GPC_BASE + pwr_domain->pgc_offset, 0x1); @@ -389,6 +392,9 @@ void imx_gpc_pm_domain_enable(uint32_t domain_id, bool on) /* enable HSIOMIX clock */ mmio_write_32 (0x32f10000, 0x2); + if (domain_id == VPU_H1) + mmio_setbits_32(IMX_VPU_BLK_BASE + 0x4, BIT(2)); + /* handle the ADB400 sync */ if (!pwr_domain->init_on && pwr_domain->need_sync) { /* clear adb power down request */ |