diff options
author | Jacky Bai <ping.bai@nxp.com> | 2020-01-20 13:56:56 +0800 |
---|---|---|
committer | Jacky Bai <ping.bai@nxp.com> | 2020-02-09 20:58:49 +0800 |
commit | 2a045c8600f2bcab3a7bd7c36c64db49638ed1a9 (patch) | |
tree | fc3d5d887db84d349af63b3973441d077f6773d3 /plat/imx/imx8m/imx8mn | |
parent | 9dec5b6f55f236304f40f2181e3784c01708a97a (diff) |
plat: imx8m: Add the M4 low power audio support on imx8m
Add the M core low power audio support on i.MX8M.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Diffstat (limited to 'plat/imx/imx8m/imx8mn')
-rw-r--r-- | plat/imx/imx8m/imx8mn/gpc.c | 3 | ||||
-rw-r--r-- | plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c | 2 | ||||
-rw-r--r-- | plat/imx/imx8m/imx8mn/include/platform_def.h | 5 |
3 files changed, 9 insertions, 1 deletions
diff --git a/plat/imx/imx8m/imx8mn/gpc.c b/plat/imx/imx8m/imx8mn/gpc.c index db48f803..246422d9 100644 --- a/plat/imx/imx8m/imx8mn/gpc.c +++ b/plat/imx/imx8m/imx8mn/gpc.c @@ -238,8 +238,9 @@ void imx_gpc_init(void) /* clear DSM by default */ val = mmio_read_32(IMX_GPC_BASE + SLPCR); val &= ~SLPCR_EN_DSM; - /* enable the fast wakeup wait mode */ + /* enable the fast wakeup wait/stop mode */ val |= SLPCR_A53_FASTWUP_WAIT_MODE; + val |= SLPCR_A53_FASTWUP_STOP_MODE; /* clear the RBC */ val &= ~(0x3f << SLPCR_RBC_COUNT_SHIFT); /* set the STBY_COUNT to 0x5, (128 * 30)us */ diff --git a/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c b/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c index 7078767d..0c856c75 100644 --- a/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c +++ b/plat/imx/imx8m/imx8mn/imx8mn_bl31_setup.c @@ -55,6 +55,8 @@ static const struct imx_rdc_cfg rdc[] = { RDC_MDAn(0x1, DID1), /* peripherals domain permission */ + RDC_PDAPn(70, D1R | D1W), + RDC_PDAPn(105, D0R | D0W), /* memory region */ RDC_MEM_REGIONn(16, 0x0, 0x0, 0xff), diff --git a/plat/imx/imx8m/imx8mn/include/platform_def.h b/plat/imx/imx8m/imx8mn/include/platform_def.h index e90fc8dd..32fb3cc5 100644 --- a/plat/imx/imx8m/imx8mn/include/platform_def.h +++ b/plat/imx/imx8m/imx8mn/include/platform_def.h @@ -122,6 +122,11 @@ #define IOMUXC_GPR10 U(0x28) #define GPR_TZASC_EN BIT(0) #define GPR_TZASC_EN_LOCK BIT(16) +#define IOMUXC_GPR22 U(0x58) +#define GPR_CM7_CPUWAIT BIT(0) +#define IMX_M4_STATUS (IMX_IOMUX_GPR_BASE + IOMUXC_GPR22) +#define IMX_M4_ENABLED GPR_CM7_CPUWAIT + #define ANAMIX_MISC_CTL U(0x124) #define DRAM_PLL_CTRL (IMX_ANAMIX_BASE + 0x50) |