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authorJacky Bai <ping.bai@nxp.com>2019-12-03 10:38:11 +0800
committerAnson Huang <Anson.Huang@nxp.com>2019-12-13 10:45:50 +0800
commit837f1ff8c210d7518d7264177b1675694f57012b (patch)
tree2844625b4c4a3663f8dcc7785a5dfb36eb45dbef /plat/imx/imx8m/ddr
parentfc444a01c1306fc09a43c9b8e064973f3ba5cb3d (diff)
plat: imx8mn: Enable dram retention suuport on imx8mn
Enable dram retention support on i.MX8MN. Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Diffstat (limited to 'plat/imx/imx8m/ddr')
-rw-r--r--plat/imx/imx8m/ddr/dram_retention.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/plat/imx/imx8m/ddr/dram_retention.c b/plat/imx/imx8m/ddr/dram_retention.c
index 91d887fe..b919fecc 100644
--- a/plat/imx/imx8m/ddr/dram_retention.c
+++ b/plat/imx/imx8m/ddr/dram_retention.c
@@ -132,8 +132,12 @@ void dram_exit_retention(void)
/* before write Dynamic reg, sw_done should be 0 */
mmio_write_32(DDRC_SWCTL(0), 0x0);
+
+#if !PLAT_imx8mn
if (dram_info.dram_type == DDRC_LPDDR4)
mmio_write_32(DDRC_DDR_SS_GPR0, 0x01); /*LPDDR4 mode */
+#endif /* !PLAT_imx8mn */
+
mmio_write_32(DDRC_DFIMISC(0), 0x0);
/* dram phy re-init */