diff options
author | Ye Li <ye.li@nxp.com> | 2019-02-27 00:07:10 -0800 |
---|---|---|
committer | Anson Huang <Anson.Huang@nxp.com> | 2019-12-13 10:45:50 +0800 |
commit | 357fbf3cf0fa72c21e1c0ed52cfed9010fe312e4 (patch) | |
tree | ed07e73e659d3473a6a79ac02fd151efd8e97d5d /plat/imx/common | |
parent | fdd8c22694528c072b0b06c0bb53d2d7c94d55f2 (diff) |
MLK-20986 imx8: Not protect OCRAM for rev A
On iMX8 Rev A the OCRAM is used to pass over ROM info, and u-boot
needs to access it. So we can't assign the OCRAM to ATF partition.
This will cause boot hang.
Rev A does not support SPL, so it is ok to not protect the OCRAM.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit c9a168bfd16e06b4d6b9f94185910023e4923cf2)
Diffstat (limited to 'plat/imx/common')
-rw-r--r-- | plat/imx/common/imx_sip_handler.c | 17 | ||||
-rw-r--r-- | plat/imx/common/include/imx_sip_svc.h | 1 |
2 files changed, 18 insertions, 0 deletions
diff --git a/plat/imx/common/imx_sip_handler.c b/plat/imx/common/imx_sip_handler.c index b2df9f95..2d8e5219 100644 --- a/plat/imx/common/imx_sip_handler.c +++ b/plat/imx/common/imx_sip_handler.c @@ -178,6 +178,23 @@ int imx_misc_set_temp_handler(uint32_t smc_fid, return sc_misc_set_temp(ipc_handle, x1, x2, x3, x4); } +int imx_get_cpu_rev(uint32_t *cpu_id, uint32_t *cpu_rev) +{ + uint32_t id; + sc_err_t err; + + if (!cpu_id || !cpu_rev) + return -1; + + err = sc_misc_get_control(ipc_handle, SC_R_SYSTEM, SC_C_ID, &id); + if (err != SC_ERR_NONE) + return err; + + *cpu_rev = (id >> 5) & 0xf; + *cpu_id = id & 0x1f; + + return 0; +} #endif /* defined(PLAT_imx8qm) || defined(PLAT_imx8qx) */ static uint64_t imx_get_commit_hash(u_register_t x2, diff --git a/plat/imx/common/include/imx_sip_svc.h b/plat/imx/common/include/imx_sip_svc.h index 8dcc8a02..26daa8c6 100644 --- a/plat/imx/common/include/imx_sip_svc.h +++ b/plat/imx/common/include/imx_sip_svc.h @@ -57,6 +57,7 @@ int imx_otp_handler(uint32_t smc_fid, void *handle, int imx_misc_set_temp_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3, u_register_t x4); +int imx_get_cpu_rev(uint32_t *cpu_id, uint32_t *cpu_rev); #endif uint64_t imx_buildinfo_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3, |