plat: imx: imx8qm/qxp: add watchdog pretimeout/status_get interfaces

Add watchdog pretimeout/status interfaces to sync with scfw.

Signed-off-by: Robin Gong <yibin.gong@nxp.com>

6 files changed, 91 insertions, 5 deletions

diff --git a/plat/imx/common/include/fsl_sip.h b/plat/imx/common/include/fsl_sip.h
index fbff22be..db4dae61 100644
--- a/plat/imx/common/include/fsl_sip.h
+++ b/plat/imx/common/include/fsl_sip.h
@@ -24,6 +24,8 @@
 #define FSL_SIP_SRTC_SET_WDOG_ACT	0x03
 #define FSL_SIP_SRTC_PING_WDOG		0x04
 #define FSL_SIP_SRTC_SET_TIMEOUT_WDOG	0x05
+#define FSL_SIP_SRTC_GET_WDOG_STAT	0x06
+#define FSL_SIP_SRTC_SET_PRETIME_WDOG	0x07
 
 #define FSL_SIP_BUILDINFO		0xC2000003
 #define FSL_SIP_BUILDINFO_GET_COMMITHASH	0x00
diff --git a/plat/imx/common/include/sci/svc/timer/api.h b/plat/imx/common/include/sci/svc/timer/api.h
index 1ad2d09b..2099af15 100644
--- a/plat/imx/common/include/sci/svc/timer/api.h
+++ b/plat/imx/common/include/sci/svc/timer/api.h
@@ -101,6 +101,22 @@ typedef uint32_t sc_timer_wdog_time_t;
 sc_err_t sc_timer_set_wdog_timeout(sc_ipc_t ipc, sc_timer_wdog_time_t timeout);
 
 /*!
+ * This function sets the watchdog pre-timeout in milliseconds. If not
+ * set then the pre-timeout defaults to the max. Once locked this value
+ * cannot be changed.
+ *
+ * @param[in]     ipc         IPC handle
+ * @param[in]     pre_timeout pre-timeout period for the watchdog
+ *
+ * When the pre-timout expires an IRQ will be generated. Note this timeout
+ * clears when the IRQ is triggered.
+ *
+ * @return Returns an error code (SC_ERR_NONE = success).
+ */
+sc_err_t sc_timer_set_wdog_pre_timeout(sc_ipc_t ipc,
+				       sc_timer_wdog_time_t pre_timeout);
+
+/*!
  * This function starts the watchdog.
  *
  * @param[in]     ipc         IPC handle
@@ -246,6 +262,21 @@ sc_err_t sc_timer_set_rtc_alarm(sc_ipc_t ipc, uint16_t year, uint8_t mon,
 				uint8_t day, uint8_t hour, uint8_t min,
 				uint8_t sec);
 
+/*!
+ * This function sets the RTC calibration value. Only the owner of the SC_R_SYSTEM
+ * resource can set the calibration.
+ *
+ * @param[in]     ipc         IPC handle
+ * @param[in]     count       calbration count (-16 to 15)
+ *
+ * The calibration value is a 5-bit value including the sign bit, which is
+ * implemented in 2's complement. It is added or subtracted from the RTC on
+ * a perdiodic basis, once per 32768 cycles of the RTC clock.
+ *
+ * @return Returns an error code (SC_ERR_NONE = success).
+ */
+sc_err_t sc_timer_set_rtc_calb(sc_ipc_t ipc, int8_t count);
+
 /* @} */
 
 #endif				/* _SC_TIMER_API_H */
diff --git a/plat/imx/common/sci/svc/timer/rpc.h b/plat/imx/common/sci/svc/timer/rpc.h
index 157322eb..8692f58a 100644
--- a/plat/imx/common/sci/svc/timer/rpc.h
+++ b/plat/imx/common/sci/svc/timer/rpc.h
@@ -50,6 +50,7 @@
 typedef enum timer_func_e {
 	TIMER_FUNC_UNKNOWN = 0,	/* Unknown function */
 	TIMER_FUNC_SET_WDOG_TIMEOUT = 1,	/* Index for timer_set_wdog_timeout() RPC call */
+	TIMER_FUNC_SET_WDOG_PRE_TIMEOUT = 12,	/* Index for timer_set_wdog_pre_timeout() RPC call */
 	TIMER_FUNC_START_WDOG = 2,	/* Index for timer_start_wdog() RPC call */
 	TIMER_FUNC_STOP_WDOG = 3,	/* Index for timer_stop_wdog() RPC call */
 	TIMER_FUNC_PING_WDOG = 4,	/* Index for timer_ping_wdog() RPC call */
@@ -59,6 +60,7 @@ typedef enum timer_func_e {
 	TIMER_FUNC_GET_RTC_TIME = 7,	/* Index for timer_get_rtc_time() RPC call */
 	TIMER_FUNC_GET_RTC_SEC1970 = 9,	/* Index for timer_get_rtc_sec1970() RPC call */
 	TIMER_FUNC_SET_RTC_ALARM = 8,	/* Index for timer_set_rtc_alarm() RPC call */
+	TIMER_FUNC_SET_RTC_CALB = 11,	/* Index for timer_set_rtc_calb() RPC call */
 } timer_func_t;
 
 /* Functions */
diff --git a/plat/imx/common/sci/svc/timer/timer_rpc_clnt.c b/plat/imx/common/sci/svc/timer/timer_rpc_clnt.c
index 9543eab3..44be73cf 100644
--- a/plat/imx/common/sci/svc/timer/timer_rpc_clnt.c
+++ b/plat/imx/common/sci/svc/timer/timer_rpc_clnt.c
@@ -232,4 +232,47 @@ sc_err_t sc_timer_ping_wdog(sc_ipc_t ipc)
 	result = RPC_R8(&msg);
 	return (sc_err_t)result;
 }
+
+sc_err_t sc_timer_get_wdog_status(sc_ipc_t ipc,
+				  sc_timer_wdog_time_t *timeout,
+				  sc_timer_wdog_time_t *max_timeout,
+				  sc_timer_wdog_time_t *remaining_time)
+{
+	sc_rpc_msg_t msg;
+	uint8_t result;
+
+	RPC_VER(&msg) = SC_RPC_VERSION;
+	RPC_SVC(&msg) = SC_RPC_SVC_TIMER;
+	RPC_FUNC(&msg) = TIMER_FUNC_GET_WDOG_STATUS;
+	RPC_SIZE(&msg) = 1;
+
+	sc_call_rpc(ipc, &msg, false);
+
+	if (timeout != NULL)
+		*timeout = RPC_U32(&msg, 0);
+	if (max_timeout != NULL)
+		*max_timeout = RPC_U32(&msg, 4);
+	if (remaining_time != NULL)
+		*remaining_time = RPC_U32(&msg, 8);
+	result = RPC_R8(&msg);
+	return (sc_err_t)result;
+}
+
+sc_err_t sc_timer_set_wdog_pre_timeout(sc_ipc_t ipc,
+				       sc_timer_wdog_time_t pre_timeout)
+{
+	sc_rpc_msg_t msg;
+	uint8_t result;
+
+	RPC_VER(&msg) = SC_RPC_VERSION;
+	RPC_SVC(&msg) = SC_RPC_SVC_TIMER;
+	RPC_FUNC(&msg) = TIMER_FUNC_SET_WDOG_PRE_TIMEOUT;
+	RPC_U32(&msg, 0) = pre_timeout;
+	RPC_SIZE(&msg) = 2;
+
+	sc_call_rpc(ipc, &msg, false);
+
+	result = RPC_R8(&msg);
+	return (sc_err_t)result;
+}
 /**@}*/
diff --git a/plat/imx/common/sip_svc.c b/plat/imx/common/sip_svc.c
index 34b15702..1885261d 100644
--- a/plat/imx/common/sip_svc.c
+++ b/plat/imx/common/sip_svc.c
@@ -41,7 +41,7 @@
 
 extern int imx_gpc_handler(uint32_t  smc_fid, u_register_t x1, u_register_t x2, u_register_t x3);
 extern int imx_cpufreq_handler(uint32_t  smc_fid, u_register_t x1, u_register_t x2, u_register_t x3);
-extern int imx_srtc_handler(uint32_t smc_fid, u_register_t x1,
+extern int imx_srtc_handler(uint32_t smc_fid, void *handle, u_register_t x1,
 	u_register_t x2, u_register_t x3, u_register_t x4);
 extern int lpddr4_dvfs_handler(uint32_t  smc_fid, u_register_t x1, u_register_t x2, u_register_t x3);
 extern int imx_src_handler(uint32_t  smc_fid, u_register_t x1, u_register_t x2, u_register_t x3);
@@ -130,8 +130,7 @@ uintptr_t imx_svc_smc_handler(uint32_t smc_fid,
 		SMC_RET1(handle, imx_cpufreq_handler(smc_fid, x1, x2, x3));
 		break;
 	case  FSL_SIP_SRTC:
-		SMC_RET1(handle, imx_srtc_handler(smc_fid, x1, x2, x3, x4));
-		break;
+		return imx_srtc_handler(smc_fid, handle, x1, x2, x3, x4);
 	case  FSL_SIP_BUILDINFO:
 		SMC_RET1(handle, imx_buildinfo_handler(smc_fid, x1, x2, x3, x4));
 		break;
diff --git a/plat/imx/common/srtc.c b/plat/imx/common/srtc.c
index 56b32a92..155d2d94 100644
--- a/plat/imx/common/srtc.c
+++ b/plat/imx/common/srtc.c
@@ -63,12 +63,14 @@ static int imx_srtc_set_wdog_action(uint32_t x2)
 }
 
 int imx_srtc_handler(uint32_t smc_fid,
+		    void *handle,
 		    u_register_t x1,
 		    u_register_t x2,
 		    u_register_t x3,
 		    u_register_t x4)
 {
 	int ret;
+	sc_timer_wdog_time_t timeout, max_timeout, remaining;
 
 	switch(x1) {
 	case FSL_SIP_SRTC_SET_TIME:
@@ -89,9 +91,16 @@ int imx_srtc_handler(uint32_t smc_fid,
 	case FSL_SIP_SRTC_SET_TIMEOUT_WDOG:
 		ret = sc_timer_set_wdog_timeout(ipc_handle, x2);
 		break;
+	case FSL_SIP_SRTC_SET_PRETIME_WDOG:
+		ret = sc_timer_set_wdog_pre_timeout(ipc_handle, x2);
+		break;
+	case FSL_SIP_SRTC_GET_WDOG_STAT:
+		ret = sc_timer_get_wdog_status(ipc_handle, &timeout,
+						&max_timeout, &remaining);
+		SMC_RET4(handle, ret, timeout, max_timeout, remaining);
 	default:
-		return SMC_UNK;
+		ret = SMC_UNK;
 	}
 
-	return ret;
+	SMC_RET1(handle, ret);
 }