diff options
| author | Bai Ping <ping.bai@nxp.com> | 2018-05-11 13:58:31 +0800 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@nxp.com> | 2018-06-11 10:33:03 +0300 |
| commit | 6aafe1fcd7296eded1163d919b6ce018487e8645 (patch) | |
| tree | 1c8ff3e1d80cc26cd78ace5ff695008e7ea14bb5 /plat/imx/common | |
| parent | a15a09e462c9a24e42084e3043aa992c59875d86 (diff) | |
plat: imx8mm: add basic imx8mm support
i.MX8MM is a new soc of the i.MX8M family, this patch
add the basic support for i.MX8MM. further code optimization
needed. WAIT mode support is currently disabled, will be enabled
later.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'plat/imx/common')
| -rw-r--r-- | plat/imx/common/sip_svc.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/plat/imx/common/sip_svc.c b/plat/imx/common/sip_svc.c index 9432c12e..02728556 100644 --- a/plat/imx/common/sip_svc.c +++ b/plat/imx/common/sip_svc.c @@ -1,6 +1,6 @@ /* * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. - * Copyright 2017 NXP + * Copyright 2017-2018 NXP * * SPDX-License-Identifier: BSD-3-Clause */ @@ -90,12 +90,14 @@ uintptr_t imx_svc_smc_handler(uint32_t smc_fid, NOTICE("smc_fid is %x\n", smc_fid); switch (smc_fid) { #ifdef PLAT_IMX8M - case FSL_SIP_GPC: - SMC_RET1(handle, imx_gpc_handler(smc_fid, x1, x2, x3)); - break; case FSL_SIP_DDR_DVFS: SMC_RET1(handle, lpddr4_dvfs_handler(smc_fid, x1, x2, x3)); break; +#endif +#if defined(PLAT_IMX8M) || defined(PLAT_IMX8MM) + case FSL_SIP_GPC: + SMC_RET1(handle, imx_gpc_handler(smc_fid, x1, x2, x3)); + break; case FSL_SIP_SRC: SMC_RET1(handle, imx_src_handler(smc_fid, x1, x2, x3)); break; |