diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2018-08-09 10:06:30 +0800 |
|---|---|---|
| committer | Anson Huang <Anson.Huang@nxp.com> | 2018-09-26 08:49:29 +0800 |
| commit | 1590be095f897790676d9c22f5338cd4d06840be (patch) | |
| tree | 3bdb74608ed066cd38a507436f964af62d004ce0 /plat/imx/common | |
| parent | 933dd5c8457a5e3c5b5e043ff90c128954164b87 (diff) | |
imx8qm/imx8qxp: add misc set temp SIP support
Add FSL_SIP_MISC_SET_TEMP support for setting thermal
alarm function.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'plat/imx/common')
| -rw-r--r-- | plat/imx/common/include/fsl_sip.h | 1 | ||||
| -rw-r--r-- | plat/imx/common/misc.c | 26 | ||||
| -rw-r--r-- | plat/imx/common/sip_svc.c | 6 |
3 files changed, 32 insertions, 1 deletions
diff --git a/plat/imx/common/include/fsl_sip.h b/plat/imx/common/include/fsl_sip.h index 7246f8f7..ddf9c02c 100644 --- a/plat/imx/common/include/fsl_sip.h +++ b/plat/imx/common/include/fsl_sip.h @@ -63,5 +63,6 @@ #define FSL_SIP_OTP_READ 0xc200000A #define FSL_SIP_OTP_WRITE 0xc200000B +#define FSL_SIP_MISC_SET_TEMP 0xc200000c #endif diff --git a/plat/imx/common/misc.c b/plat/imx/common/misc.c new file mode 100644 index 00000000..be18673e --- /dev/null +++ b/plat/imx/common/misc.c @@ -0,0 +1,26 @@ +/* + * Copyright 2018 NXP + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include <debug.h> +#include <stdlib.h> +#include <stdint.h> +#include <smcc_helpers.h> +#include <std_svc.h> +#include <types.h> +#include <platform_def.h> +#include <fsl_sip.h> +#include <sci/sci.h> + +extern sc_ipc_t ipc_handle; + +int imx_misc_set_temp_handler(uint32_t smc_fid, + u_register_t x1, + u_register_t x2, + u_register_t x3, + u_register_t x4) +{ + return sc_misc_set_temp(ipc_handle, x1, x2, x3, x4); +} diff --git a/plat/imx/common/sip_svc.c b/plat/imx/common/sip_svc.c index 596da8c3..b8f918e9 100644 --- a/plat/imx/common/sip_svc.c +++ b/plat/imx/common/sip_svc.c @@ -27,6 +27,8 @@ extern int imx_soc_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u extern int imx_hab_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3, u_register_t x4); extern int imx_noc_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3); extern int dram_dvfs_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, u_register_t x3); +extern int imx_misc_set_temp_handler(uint32_t smc_fid, u_register_t x1, u_register_t x2, + u_register_t x3, u_register_t x4); bool wakeup_src_irqsteer = false; @@ -102,7 +104,6 @@ int imx_wakeup_src_handler(uint32_t smc_fid, return ret; } - /* i.MX platform specific service SMC handler */ uintptr_t imx_svc_smc_handler(uint32_t smc_fid, u_register_t x1, @@ -153,6 +154,9 @@ uintptr_t imx_svc_smc_handler(uint32_t smc_fid, case FSL_SIP_OTP_READ: case FSL_SIP_OTP_WRITE: return imx_otp_handler(smc_fid, handle, x1, x2); + case FSL_SIP_MISC_SET_TEMP: + SMC_RET1(handle, imx_misc_set_temp_handler(smc_fid, x1, x2, x3, x4)); + break; #endif case FSL_SIP_BUILDINFO: SMC_RET1(handle, imx_buildinfo_handler(smc_fid, x1, x2, x3, x4)); |